iosr-JVSP   Volume-11 ~ Issue-4 ~ Jul. - Aug. 2021

ABSTRACT: The integrated circuit/system designers are faced with problems that involves nano-scale devices with far less than ideal characteristics, very high integration densities (i.e. giga-scale complexity), very high operation speeds and data transmission rates, and system-level integration of analog and digital functions. The single-electron tunnelling (SET) devices might be scaled down almost to the molecular level. Gate length variability due to intra or inter die variations can lead to considerable mismatch between devices even inside the same chip. This variability has to be considered in detail and new device models should be developed, aiming in modelling its effects.......

Key Words: mosfet, line-width-roughness, vhdl-ams, digital-gates, single-electron-transistor, coulombblockage, compact-device-modelling

[1]. Y. S. Yu, H. S. Lee, and S. W. Hwang, SPICE Macro-Modelling for the Compact Simulation of Single Electron Circuits, J. Korean Phys. Soc. 33, 1998, 269.
[2]. G. P. Patsis, Modelling MOSFET gate length variability for future technology node, Phys. Stat. Sol. (a) 205 (11), 2008, 2541-2543. Ansys site: http://www.ansys.com/

ABSTRACT: Optical Character Recognition (OCR) is a technology that extracts all the text from the images, .pdf documents or scanned files. So OCR converts normal scanned documents text-searchable so to allow content search on the same. Hindi being the national language of India, with such huge population makes document managing and preservation difficult in government sector. Hence, this paper presents an efficient algorithm Fuzzy KNN for recognition of Hindi script characters from printed documents. Optical Character Recognition (OCR) systems developed for the Hindi language carry a very poor recognition rate due to shirorekha as well as joint characters. This paper proposes an OCR for printed Hindi text in Devanagari script, using Fuzzy KNN which improves its efficiency. One of the major reasons for the poor recognition rate is error in character segmentation also. The presence of touching......

Keywords – Optical Character Recognition, Fuzz-KNN, Wavelet Transform

[1]. Gonzalez R.C and Woods, R.E "Digital Image Processing", Second Edition, Pearson Education, Singapore.
[2]. "Character Recognition System" by Mohammed Cheriet, Nawwwaf Kharma, Chen-Lin Liu, Ching Y.Suen.
[3]. "Design Implementation of OCR to recognize Gujarati script using Template Matching" by Prof. K S Shah, A. Verma.
[4]. "Optical Character Recognition" by Jesse Hansen.
[5]. "Otsu.N, 1979" A threshold selection method from grey level histogram. IEEE. Trans. Sys. Man. And Cyber, 9:62-66.
[6]. "Pre-processing algorithms for the recognition of tamil hand written characters" by N Shanthi and K Duraiswamy.

ABSTRACT: This paper proposes efficient constant multiplier architecture based on vertical-horizontal binary common sub-expression elimination (VHBCSE) algorithm based on carry select adder using common Boolean logic and modified full adder for planning a reconfigurable finite impulse response(FIR) channel whose coefficients can progressively change continuously. To plan a proficient reconfigurable FIR channel, as indicated by the proposed modified VHBCSE calculation, 2-bit paired regular sub-articulation end (BCSE) calculation has been connected vertically crosswise over contiguous coefficients on the 2-D space of the coefficient lattice at first, taken after.......

Keywords: Index Terms—VHBCSE algorithm, MCM, FIR filter, VLSI design

[1]. S. J. Darak, S. K. P. Gopi, V. A. Prasad, and E. Lai, "Low-complexity reconfigurable fast filter bank for multi-standard wireless receivers," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 22, no. 5, pp. 1202–1206, May 2014.
[2]. J. L. Nunez-Yanez, T. Spiteri, and G. Vafiadis, "Multi-standard reconfigurable motion estimation processor for hybrid video codecs," IET Comput. Digit. Tech., vol. 5, no. 2, pp. 73–85, Mar. 2011.
[3]. H. Samueli, "An improved search algorithm for the design of multiplier less FIR filters with power-of-two coefficients," IEEE Trans. Circuits Syst., vol. 36, no. 7, pp. 1044–1047, Jul. 1989.
[4]. A. G. Dempster and M. D. Macloed, "Use of minimum-adder multiplier blocks in FIR digital filters," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 42, no. 9, pp. 569–577, Sep. 1995.
[5]. C. Y. Yao, H. H. Chen, T. F. Lin, C. J. Chien, and C. T. Hsu, "A novel common subexpression elimination method for synthesizing fixed-point FIR filters," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 51, no. 11, pp. 2215–2221, Nov. 2004.

ABSTRACT: As we observe, that with the evolution of technology, devices are scaling down from time to time, which leades to reduction in the the length of the channel of the MOSFET, giving importance to speed of operation. This paper consist of designing 6T SRAM cell, along with its READ and WRITE operations which operates at high speed consuming less power. The SRAM cell is simulated and the graphs for READ and
WRITE operations and respective power results are presented.The tool used for designing of 6T SRAM cell is Tanner Tool which operates at 250nm technology and 2.5volts as supply voltage

Key Word: SRAM, Read,Write,Tanner,250nm.

[1]. K. Dhanumjaya, Dr. MN.Giri Prasad, Dr. K.Padmaraju, Dr. M.Raja Reddy "Low Power and Improved Read Stability Cache Design in 45nm Technology" International Journal of Engineering Research and Development, Volume 2, Issue 2 (July 2012), PP. 01-07. [2]. Neil H.E. weste & David Money Harris "CMOS VLSI Design: A Circuits and Systems Perspective" ISBN: 0321149017/9780321149015Third edition, Pearson Education, 2005.
[3]. G. Shivaprakash1* and D. S. Suresh2"Design of Low Power 6T-SRAM Cell and Analysis for High Speed Application", Indian Journal of Science and Technology, Vol 9(46).
[4]. Abhishek Agal et al Int. Journal of Engineering Research and Applications "6T SRAM Cell: Design And Analysis", ISSN : 2248-9622, Vol. 4, Issue 3( Version 1), March 2014, pp.574-577

ABSTRACT: Analyzing the characteristics of an ECG signal plays a vital role in the detection of various Cardiovascular Diseases (CVDs). However the analysis of ECG signal is not a simple task. In this paper a broad survey is carried out over various approaches focused to analyze the characteristics of ECG signal to perform automatic Cardiac Arrhythmia detection. Initially, the details of ECG acquisition, Characteristics of ECG and the possible arrhythmias based on the abnormalities in the ECG signal are discussed. Based on the step by step execution of the system model, all the approaches are classified as preprocessing approaches, feature extraction approaches and classification approaches. These approaches are further classified in different ways based on the methodology used for accomplishment. This paper also discussed about various standard databases which are used for the implementation of developed approaches.

Keywords: ECG, Cardiovascular Diseases, Cardiac Arrhythmia, Feature Extraction, MIT-BIH.

[1]. Harikrishnan S, Leeder S, Huffman M, Jeemon P, Prabhakaran D, A Race against Time: The Challenge of Cardiovascular Disease in Developing Economies. 2nd ed. New Delhi, India: New Delhi Centre for Chronic Disease Control; 2014.
[2]. Xavier D, Pais P, Devereaux PJ, Xie C, Prabhakaran D, Reddy KS, Gupta R, Joshi P, Kerkar P, Thanikachalam S, Haridas KK, Jaison TM, Naik S, Maity AK, Yusuf S; CREATE registry investigators. Treatment and outcomes of acute coronary syndromes in India (CREATE): a prospective analysis of registry data. Lancet., 371, 2008, pp: 1435–1442.
[3]. A.S. Adabag, G. Peterson, F.S. Apple, J. Titus, R. King, R.V. Luepker, "Etiology of sudden death in the community: results of anatomic, metabolic, and genetic evaluation", Am. Heart. J. 159, 2010, pp: 33–39.
[4]. J.J. Goldberger, A.E. Buxton, M. Cain, O. Costantini, D.V. Exner, B.P. Knight, D.Lloyd-Jones, A.H. Kadish, B. Lee, A. Moss, R. Myerburg, J. Olgin, R. Passman, D.Rosenbaum, W. Stevenson, W. Zareba, D.P. Zipes, "Risk stratification for arrhythmic sudden cardiac death: identifying the roadblocks", Circulation, 123, 2011, pp: 2423–2430.
[5]. M. Velic, I. Padavic, S. Car, "Computer aided ECG Analysis – State of the Art and Upcoming Challenges", 2013,

ABSTRACT: In this research, the Dynamic Element Matching Technique (DEM) algorithm is used, known as Partial Binary Tree Network (PBTN), been proposed from previous research that aims to push the boundaries from 8-bit to 10-bit. PBTN is used because it has a lower complexity circuit and fewer glitches produced at the output signal. Besides, in this research, the Current Controlled Current Source (CCCS) used to magnify the output in previous research is replaced with an operational amplifier (op-amp). The 8-bit 1-MSB achieved a power consumption of 16.7 mW, much lower compared to the previous research. For 10-Bit 1-MSB, the circuit achieved DNL of -0.535378495 LSB, INL of 0.955382 LSB, with a power consumption of 66.31 mW.

Keywords: Partial Binary Tree Network, Dynamic Element Matching, current steering DAC, INL, DNL,10-BIT 1-MSB

[1]. Robert Gregoire, B. & Moon, U.K. Reducing the effects of component mismatch by using relative size information. Proceedingof the IEEE International Symposiumon Circuits and Systems. 2008;512-515.
[2]. Mustaffa, M. T., Lim Y. C., Teh C. Y. Current Steering Digital Analog Converter with Partial Binary Tree Network (PBTN). Indonesian Journal of Electrical Engineering and Computer Science. 2017;5(3):643-649.
[3]. William Yeap, K.S.& Mustaffa, M. T. A 0.13-um 6 to 8-bit PBTN DEM Current Steering DAC. IOSR Journal of VLSI and Signal Processing.2019;9(5):1-10.
[4]. Myderrizi, I. &Zeki, A. Current-Steering Digital-to-Analog Converters: Functional Specifications, Design Basics, and Behavioral Modeling. Antennas and Propagation Magazine, IEEE.2010; 52:197-208.
[5]. Galton, I. Why Dynamic-Element-Matching DACs Work. IEEE Transactions on Circuits and Systems II: Express Briefs. 2010; 57:69-74.