iosr-JVSP   Volume-14 ~ Issue-5 ~ Sep. - Oct. 2024

ABSTRACT: Super-resolution (SR) become the most important task in image processing because of requirement of high quality of images. It becomes popular in technology like computer vision and pattern recognition. In Single Image Super-resolution (SR) uses the sequences of single low resolution (LR) images from high resolution (HR) to improve the quality of image. The SR is an image processing problem which aims to generate a high resolution (HR) image from low resolution input image. The SR is difficult because of the missing information in the given LR image. Thus in SR it is very important to boost the reconstruction performance so that, there is need of effective prior knowledge....

Keywords: Accuracy, bi-linear SR, Directional group sparsity, PSNR, Super-Resolution.

[1]. Xiaoyan Li, Hongjie He, Ruxin Wang, and Dacheng Tao, "Single Image Super resolution via Directional Group Sparsity and Directional Features", IEEE transaction on image processing, Vol. 24, No. 9 Sept 2015.
[2]. X. Li and M. T. Orchard, "New edge-directed interpolation," IEEE Trans. Image Process., vol. 10, no. 10, pp. 1521–1527, Oct. 2001.
[3]. X. Zhang and X. Wu, "Image interpolation by adaptive 2D autoregressive modeling and soft-decision estimation," IEEE Trans. Image Ptocess, vol. 17, no. 6, pp. 887–896, Jun. 2008.
[4]. D. Tao, L. Jin, Y. Wang, and X. Li, "Person reidentification by minimum classification error-based KISS metric learning," IEEE Trans. Cybern., vol. 45, no. 2, pp. 242–252, Feb. 2015.
[5]. C. Xu, D. Tao, and C. Xu, "Multi-view intact space learning," IEEE Trans. Pattern Anal. Mach. Intell., Mar. 2015, doi: 10.1109/TPAMI.2015.2417578.

ABSTRACT: The floor-plan design is one of the important problem and this problem can be modeled as a combinatorial optimization problem.Today,VLSI technology has taken a fundamental role in developing most of the high-tech electronic circuits. Even though VLSI design is renowned for its smaller size, lower cost, lower power, high reliability and high functionality, the design process takes long time and produces high risk. In this paper, a new expression NGEP has been proposed to representation VLSI floor plan having rectangular I-shape and as well as L-shape module. An algorithm has been discussed where input of the algorithm is an NGPE and corresponding output is the shape and layout/placement of the module of the floor plan. Two operations have been discussed for any modification of VLSI floor plan having rectangular and L-shape module.

[1]. R. H. J. M. Otten, "Automatic floorplan design", Proc. DAC, pp. 261-267, 1982
[2]. Y. Pang, C. K. Cheng and T. Yoshimura, " An enhance perturbing algorithm for floorplan design using O tree representation", Proc. ISPD, pp. 168-173, 2000.
[3]. X. Hong, G. Huang, Y. Cai, S. Dong, C. K. Cheng and J. Gu ," Corner block list: an effective and efficient topological representation of non slicing floorplan", Proc. ICCAD, pp. 8-12, 2000.
[4]. Y. C. Chang, Y. W. Chang, G. M. Wu and S. W. Wu, "B* trees: a new representation for non slicing floorplans", Proc. DAC, pp. 458-463, 2000.

ABSTRACT: Convolution coding has been used in communication systems including deep space communication and wireless communication. With demand for higher data rates beyond 10Gbps as per the recommendations of 60GHz communication standards processing speed of hardware and software modules need to further enhance to meet the requirements. VLSI circuits are designed with transistors sizing in nanometer range so as to operate at higher frequencies. With advances in semiconductor technology, transmitter and receiver circuits that meet the next generation wireless standards can be implemented on hardware that can operate at GHz frequency meeting the data rate greater than 10Gbps.......

Keywords. Ternary computing, Ternary convolutional encoder , Higher frequency .

[1]. Fazal Noorbasha, G.Jhansi , K.Deepthi , K Hari Kishore, "ASIC Implementation of Convolution Encoder and Viterbi Decoder Based Cryptography System" (IJITEE) ISSN: 2278-3075, Volume-8 Issue-6S, April 2019.
[2]. Zhang Taotao, Zhang JingKe, Zhou Zhiwen, Yang Zhifei, Liu Wanhong, "FPGA-Based Large Constraint Length Convolution Code Encoder Verification, ICSP 2019
[3]. Dr. S Aruna, Mr. A.V. Adiseshu, Dr.K.Srinivasa Naik , "Design of Viterbi Decoder for Speech to Text Conversion Application using ACS Architecture,IOSR journal of VLSI and signal processing Jan 21, 2019
[4]. Gabriele Meoni, "Design Optimization for High Throughput Recursive Systematic Convolutional Encoders" ICSTCC 2018
[5]. Prof. Vijaya Bharathi M, Sneha.H., Mahesh.M., Shwetha.N., Sowmya.S, "Forward Error Correcting Implementation Using Convolutional Encoders and Viterbi decoding" International Journal of Electrical, Electronics and Computer Systems (IJEECS) Volume -6, Issue-3, 2018

ABSTRACT: The Serial Peripheral Interface (SPI) and Inter-Integrated Circuit (I2C) protocols are widely used for communication between microcontrollers, sensors, and other digital devices. The correctness and reliability of these protocols are essential for proper system functioning. Therefore, it is necessary to verify these protocols thoroughly to ensure that they are error-free. In this paper, a novel verification environment is proposed for the verification of SPI and I2C protocols using SystemVerilog........

KEYWORDS: Code coverage; functional coverage; SPI; I2C; System Verilog;

[1]. Chetan N, and R. Krishna, "Verification of SPI protocol Single Master Multiple Slaves using System verilog and Universal Verification Methodology (UVM)", International Journal of Engineering Research and Applications, Vol. 11, Issue 7, July 2021.
[2]. Ananthula Srinivas, M.Kiran Kumar, and Jugal Kishore Bhandari., Design and Verification of Serial Peripheral Interface", International Journal of Engineering development and Research, Vol. 1, Issue 3, Dec. 2014, pp. 130 -136.
[3]. System Verilog Tutorial: https://www.chipverify.com/systemverilog/systemverilog tutorial
[4]. F.Leens, "An Introduction to I2C and SPI Protocols," IEEE Instrumentation & Measurement Magazine, pp. 8-13, February 2009, DOI: 10.1109/MIM.2009.4762946
[5]. M.Sukhanya, and K.Gavaskar, "Functional Verification Environment for I2C Master Controller using System Verilog", 2017 4th International Conference on Signal Processing, Communications and Networking (ICSCN - 2017), March 16 – 18, 2017, Chennai, INDIA, DOI: 10.1109/ICSCN.2017.8085732

ABSTRACT: An eigenmode projection technique is utilized to solve the problems ofthe electromagnetic wave propagation in shielded transmission lines. The technique isadopted to solve theproblems ofinfinite length rectangular shaped loaded lineswhere a fictitious canonical cavity surrounded by perfect electric surfaceis chosen to enclose the line and the fields inside are expanded in terms ofthe cavitysolenoidal and irrotational eigenmodes where they are considered as a complete set torepresent any vector field inside the cavity. The fields in Maxwell's equations inside theenclosed region are then expanded using the cavity eigenmodes. Finally, a set of equationsfor the eigenmodes are resulted by using thefields expansions in Maxwell's equations ofthe cavity where mode projections are done. This set of equations aresolved together toget the line dispersion curve and the propagating modes.

Key Word: Eigenmodes; Resonance; Transmission Lines; Microstrip Lines; Coplanar Waveguides.

[1]. L. Rayleigh, "On the passage of electric waves through tubes," PhilosophicalMagazine, vol. 43, 1897.
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ABSTRACT: The Key Objective is HDL RTL Design Architecture of Ultra high multi Clock Frequency Speed Rate ( MHz, GHz, THz, PHz, EHz, ZHz, etc) Bits Per Second Baud Rate ) P.R.B.S(Pseudo Random Binary Sequence) Transceiver Soft A.S.I.C IP Core product for identification of the property of Different Pseudo Random Binary Sequence Patterns (Seed Words) of 2e7-1, 2e10-1, 2e15-1, 2e23-1, 2e31-1 tapped elements as per C.C.I.T.T-I.T.U Standards and IEEE-754 Single and Double Data Rate Data Precision Standards (32 bit & 64 Bit Data Width ) suited for Very Advanced Futuristic Hi-tech Smart High Speed Long Distance Wireless Digital Communication A.S.I.C Products / Applications like Space/Satellite, Aerospace and Large Data Processing.......

Key Word: P.R.B.S- Pseudo Random Binary Sequence, Wi-Fi-Wireless Fidelity, F.P.G.A – Field Programmable Gate Array, IDE – Integrated Development Environment. C.C.I.T.T- Consulting Committee for International Telegraph and Telephone, I.T.U- International Telecommunication Union, A.S.I.C- Application Specific Integrated Circuit, E.D.A- Electronic Design Automation.

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[3]. Paul H. Bardell, William H. McAnney, and Jacob Savir, "Built-In Test for VLSI: Pseudorandom Techniques", John Wiley & Sons, New York, 1987.
[4]. Wikipedia, "http://en.wikipedia.org/wiki/ Pseudorandom_binary_sequence"
[5]. Wikipedia "http://en.wikipedia.org/wiki/ Linear_feedback_shift_register"

ABSTRACT: Super-resolution (SR) become the most important task in image processing because of requirement of high quality of images. It becomes popular in technology like computer vision and pattern recognition. In Single Image Super-resolution (SR) uses the sequences of single low resolution (LR) images from high resolution (HR) to improve the quality of image. The SR is an image processing problem which aims to generate a high resolution (HR) image from low resolution input image. The SR is difficult because of the missing information in the given LR image........

Key Word: Accuracy, bi-linear SR, Directional group sparsity, PSNR, Super-Resolution.

[1]. Xiaoyan Li, Hongjie He, Ruxin Wang, and Dacheng Tao, "Single Image Super resolution via Directional Group Sparsity and Directional Features", IEEE transaction on image processing, Vol. 24, No. 9 Sept 2015.
[2]. X. Li and M. T. Orchard, "New edge-directed interpolation," IEEE Trans. Image Process., vol. 10, no. 10, pp. 1521–1527, Oct. 2001.
[3]. X. Zhang and X. Wu, "Image interpolation by adaptive 2D autoregressive modeling and soft-decision estimation," IEEE Trans. Image Ptocess, vol. 17, no. 6, pp. 887–896, Jun. 2008.
[4]. D. Tao, L. Jin, Y. Wang, and X. Li, "Person reidentification by minimum classification error-based KISS metric learning," IEEE Trans. Cybern., vol. 45, no. 2, pp. 242–252, Feb. 2015.
[5]. C. Xu, D. Tao, and C. Xu, "Multi-view intact space learning," IEEE Trans. Pattern Anal. Mach. Intell., Mar. 2015, doi: 10.1109/TPAMI.2015.2417578.