iosr-JVSP   Volume-4 ~ Issue-1 ~ Jan-Feb 2014

ABSTRACT: For Tracking interfaces and shapes which depends on the regions of pixel intensity is a challenging task in image segmentation. Many level set methods have been formulated for region based and edge based models in computer aided diagnosis systems. In order to provide accurate modeling involving numerical computations, contours, lesions and bias variance which often rely on pixel intensity variations for the region of Interest. The proposed method involves the formulation by deriving a global criterion function in terms of neighborhood pixels to represent domain field and bias variance characteristics. Gaussian impulse is used for smoothening sharp edges. Computational neural networks provide the integral part of most learning algorithms as images consists of redundant attributes of data which have redundant network connections with different input patterns of small weights form a network training process for minimizing the energy and to estimate the bias field correction for various imaging modalities. In order to have valuable diagnostic information in disease diagnosis the extracted features of PET and CT images are modeled with neural networks. The trained data sets are useful in removing artifacts and providing resultant ROI.
Keywords: Contours, Gaussian impulse, Redundant attributes, bias variance.

[1] S. Asif Hussain, Dr. M. N. Giri Prasad and Dr. D. Satya Narayana "A novel Feature Selection mechanism for medical image retrieval system" International Journal of Advances in Engineering & Technology(IJAET), Volume 6 Issue 3, pp. 1283-1298, July 2013, ISSN: 2231-1963 DOI:10.7323.
[2] S. Asif Hussain, Dr. M. N. Giri Prasad and Dr. D. Satya Narayana "Superior Reconstruction Quality improvement of CT Image for Bias Correction Variance Measures"- International Journal of Computer Applications 2012- IJCA July 2012 Published by Foundation of Computer Science, New York, USA. , Proceedings in Volume 47 - Number 5 of IJCA July 2012 ISBN: 973-93-80868-79-4 ISSN: 0975 – 888 DOI 10.5120/7185-9918.
[3] S. Asif Hussain, Dr. M. N. Giri Prasad and Dr. D. Satyanarayana "3D Medical Image Modeling with Dynamic Image Reconstruction"- International Journal of Engineering Research and Technology. 2012- IJERT July 2012 Published by International Research Publication House, Proceedings in Volume 5, Number 3 (APRIL 2012), pp. 213-217 ISSN 0974-3154.
[4] Olabarriaga, S.D. and Smeulders, A.W.M., "Interaction in the Segmentation of Medical Images: A Survey", Med. Image Analysis, 5: 127-142, 2001.
[5] Osher, S. and Sethian, J.A., "Fronts Propagating with Curvature Dependent Speed: Algorithms Based on Hamilton-Jacobi Formulations", J. Comp. Physics, 79:12- 49, 1988.

ABSTRACT: In this paper an attempt has been made to derive the lifting scheme for a set of new bi-orthogonal wavelets and apply on image compression. Four new bi-orthogonal wavelets are designed by taking different basis functions which are selected so as to capture the sharp edges which are common in images. For these classical wavelets, lifting versions are calculated and presented in this paper. The lifting step calculation is simplest among the schemes in related literature. From the designed wavelet filters, the poly-phase matrix is written and decomposed the matrix into a form from which lifting steps are directly available. To incorporate coding Set Partitioning In Hierarchical Trees (SPIHT) algorithm is used. The Peak Signal to Noise Ratio (PSNR), Compression Ratio (CR), Transforming Time (TT), Encoding Time (ET) and Decoding Times (DT) are calculated. It was found that the compression performance of new classical wavelets is a little better than that of existing classical/first generation wavelets and that of new lifting based wavelets is far better than that of existing classical wavelets and also existing lifting based wavelets.
Keywords: Lifting scheme, basis functions, compression, poly-phase representation.

[1] Wim Sweldens. The lifting scheme:A construction of second generation wavelets. SIAMJ. Math. Anal, 29 (1997) 2511-546.
[2] Wim Sweldens. The lifting scheme:A custom-design construction of biorthogonal wavelets. Journal ofAppl. and Comput. Harmonic Analysis, 3, 2(1996) 186-200.
[3] Daubechies, I., and Sweldens, W. "Factoring wavelet transforms into lifting steps". Journal of Fourier Analysis and Applications 4, 3 (1998), 245-267.
[4] Claypoole, R. L., Davis, G., Sweldens, W., and Baraniuk, R. D." Nonlinear wavelet transforms for image coding". In Proceedings of the 31st Asilomar Conference on Signals, Systems, and Computers, Volume 1 (1997), pp. 662-667.
[5] Heijmans, H. J. A. M., and Goutsias, J. "Nonlinear multiresolution signal decomposition schemes: Part II: morphological wavelets". IEEE Transactions on Image Processing 9,11 (2000), 1897-1913.

ABSTRACT: The workhorse of the present electronics industry, silicon MOSFET, is having a unique attribute; its logic characteristics improve as its dimensions are reduced. Without further reductions in operating voltage, future scaling may not be feasible. One possible solution is to introduce a new channel material in which charge carriers travel at a much higher velocity than in silicon and this would allow a reduction in voltage without a loss of performance. This factor has drowned the attention of research community around the world towards III–V compound semiconductors. No other family of materials currently being considered to replace the silicon channel in a MOSFET has such an impressive list of attributes. Today, III–V CMOS technology is a mainstream part of semiconductor research. Their future role has recently been recognized in the International Technology Roadmap for Semiconductors 7.The application of simulation tools in the development of new processes and novel device structures has become a worthwhile and an alternative to the experimental route. For all these tasks the technology computer-aided design (TCAD) was coined.

[1] A High-Frequency Transconductance Method For Characterization Of High-Κ Border Traps In III-V Mosfets by Sofia Johansson, Martin Berg, Karl-Magnus Persson, Member, IEEE, and Erik Lind, IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 60, NO. 2, FEBRUARY 2013
[2] Process Development and Characteristics of Nano III-V MOSFET by Donald Cheng, Chichih Liao, K.Y. Cheng, Milton Feng, CS MANTECH Conference, April 14-17, 2008, Chicago, Illinois, USA
[3] Investigation of the Novel Attributes of a Fully Depleted Dual-Material Gate SOI MOSFET byAnurag Chaudhry and M. Jagadesh Kumar, Senior Member, IEEE , IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 51, NO. 9, SEPTEMBER 2004
[4] Nanometre-scale electronics with III–V compound semiconductors, Jesús A. del Alamo, 17 NOVEMBER 2011 | VOL 479 | NATURE | 317.
[5] M. Radosavljevic, B. Chu-Kung, S. Corcoran, G. Dewey, M. K. Hudait, J. M. Fastenau, J. Kavalieros, W. K. Liu, D. Lubyshev, M. Metz, K. Millard, N. Mukherjee, W. Rachmady, U. Shah, and R. Chau,"Advanced high-K gate dielectric for high-performance short-channel In0.7Ga0.3As quantum well field effect transistors on silicon substrate for low power logic applications," in IEDM Tech. Dig., 2009, pp.14.

ABSTRACT: The paper seeks to address issues relating to Due Process in Nigeria's local government administration. As part of its objectives it has examined what Due Process concept is all about and what constitute its main problems with particular reference to contract awards. In the paper literature is reviewed which provide some understanding on Due Process objectives, stages, requirements, benefits as well as problems associated with it implementation. A research framework is provided, which suggest empirical examination of Due process and local government administration in Nigeria.
Keywords: Due process, Local government administration, Nigeria.

[1]. Adedakun, O.A., Ibironke, O.T., &Babatunde, S. O., (2013).Assessment of competitive
[2]. tendering methods of procuring educational building projects in Nigeria. Journal of Facilities Management, 11 (1), 81-94.
[3]. Aje, I. (2012). The impact of contractor's prequalification on construction project delivery in Nigeria. Engineering, Construction and Architectural Management, 19 (2), 159-172.
[4]. Apoti, S.A. (2005). Main Features of the Nigerian Public Sector Procurement System: The Due Process Mechanism. A paper presented at the Third Annual International Economic and Management Retreat: held in Accra, Ghana.
[5] Christodolou, S. (2010).Bid mark-up selection using artificial neural networks and an entropy metric.Engineering, Construction and Architectural Management, 17 (4), 424-439.

ABSTRACT: The paper brings forth a novel idea for intensification of the security system in the world's largest railway networks, Indian Railways. The design of smart cards has been proposed in the present paper which would play the role of Unique ID as well as passengers would be able to book their tickets via the card and even would be helpful in security checks. The paper also discusses the overall operation of the security arrangement and gives the rough diagrammatic picture of the setup.
Keywords: Indian railway, security systems, smart card, UID, UTS.

[1]. "Security Management in Indian Railway", Report No. 14 (Railways).
[2]. Kanakia, H.; Nadhamuni,S.; Sarma, S, "A UID Numbering Scheme", May 2010.

ABSTRACT: Inthis paper we attempt to evaluate the challenge of compression of speech signals. Compression of speech signals have pre-dominantly occupied a considerable position in the present era of multimedia. Speech compression is one area of digital signal processing that focuses on reducing the bit rate of the speech signal for transmission or storage without significant loss of quality. In recent years a new technique called wavelet transform has been proposed for signal analysis. It has been successfully used in image compression application. So far.

[1] S. M. Joseph, "Spoken digit compression using wavelet packet,", International conference on signal and image processing, PP: 255-259, 2010.
[2] M. A. Osman and N. Al, "Speech compression using LPC and wavelet," 2nd International conference on computer engineering and technology, PP: V7-92 – V7-99, 2010.
[3] J. Y. Zhang and L. X. Gao, "Research on the selection of wavelet function for the feature extraction of shock fult in the bearing diagnosis," International conference on wavelet analysis and pattern recognition, PP: 1630-1634, 2007.
[4] R.S.Cai and Y.M.Guo, "Wavelet based multi feature V/UV speech classification algorithm," International conference wireless mobile and sensor networks, PP: 897 – 900, 2007.
[5] S. Ranjan. "Exploring the DWT as a tool for Hindi speech recognition," International journal of computer theory and engineering, PP: 642-646, 2010.

ABSTRACT: Based on fast finite-impulse response (FIR) algorithms (FFAs), this paper proposes new parallel FIR filter structures, which are beneficial to symmetric coefficients in terms of the hardware cost, under the condition that the number of taps is a multiple of 2 or 3. The proposed parallel FIR structures exploit the inherent nature of symmetric coefficients reducing half the number of multipliers in sub filter section at the expense of additional adders in preprocessing and post processing blocks. Exchanging multipliers with adders is advantageous because adders weigh less than multipliers in terms of silicon area; in addition, the overhead from the additional adders in preprocessing and post processing blocks stay fixed and do not increase along with the length of the FIR filter, whereas the number of reduced multipliers increases along with the length of the FIR filter. For example, for a four-parallel 72-tap filter, the proposed structure saves 27 multipliers at the expense of 11 adders, whereas for a four-parallel 576-tap filter, the proposed structure saves 216 multipliers at the expense of 11 adders still. Overall, the proposed parallel FIR structures can lead to significant hardware savings for symmetric convolutions from the existing FFA parallel FIR filter, especially when the length of the filter is large Keywords: FIR (Finite Impulse Response), FFA, Adder, Mulitplier

[1] D. A. Parker and K. K. Parhi, "Low-area/power parallel FIR digital filter implementations," J. VLSI Signal Process. Syst., vol. 17, no. 1, pp. 75–92, 1997.
[2] J. G. Chung and K. K. Parhi, "Frequency-spectrum-based low-area low-power parallel FIR filter design," EURASIP J. Appl. Signal Process., vol. 2002, no. 9, pp. 444–453, 2002.
[3] K. K. Parhi, VLSI Digital Signal Processing Systems: Design and Implementation. New York: Wiley, 1999.
[4] Z.-J. Mou and P. Duhamel, "Short-length FIR filters and their use in fast nonrecursive filtering," IEEE Trans. Signal Process., vol. 39, no. 6, pp. 1322–1332, Jun. 1991.
[5] J. I. Acha, "Computational structures for fast implementation of L-path and L-block digital filters," IEEE Trans. Circuit Syst., vol. 36, no. 6, pp. 805–812, Jun. 1989.
[6] C. Cheng and K. K. Parhi, "Hardware efficient fast parallel FIR filter structures based on iterated short convolution," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 51, no. 8, pp. 1492–1500, Aug. 2004.

ABSTRACT:Degraded signal has an adverse effect on the performance of the system and therefore it must be removed before further processing of signals. Spectral analysis through the Fourier transform is the simplest way to remove the noise, but it is limited to only stationary signals. Non stationary signals require continuous analysis of the signal in time and frequency domain. Wavelets provide better time, frequency localization and multi-resolution analysis compared to the Fourier transform. In this paper, we use the Cauchy probability density function for the study of different wavelets in denoising of audio signals. Compared to Gaussian Density Function, Cauchy distribution shown the non Gaussian statistics with heavy tailed distribution. Soft and Hard thresholding are estimated at each decomposition level and performance are evaluated in terms of signal-to-noise ratio (SNR).

Keywords: wavelet, level of Decomposition, wavelet thresholding, Cauchy distribution, denoising, SNR

[1] Amara Graps, "An introduction to Wavelets", IEEE Computation Science and Engineering, Vol.2, Issue 2, page 50-61,Jun 1995.
[2] M.Portnoff, "Time-frequency representation of digital signals and systems based on short-time Fourier analysis. Acoustics, Speech and Signal Processing", IEEE Trans on, 1980. 28(1): p. 55-69.
[3] C.S.Burrus,R.A.Gopinath, and H.Guo, "Introduction to Wavelets and Wavelet Tranforms-A Primer". New Jersey, NJ,USA:Prentice Hall, 1997.
[4] S.Mallat, "A theory for multiresolution signal decomposition: the wavelet representation," IEEE Trans. Pattern Anal. Mach. Intell, Vol.11, no. 7, pp. 674–693, Jul. 1989.
[5] Daubechies Ingrid, "Ten Lectures on Wavelets", 9e, SIAM, ISBN: 780-89871-274-2, 2006.
[6] Donoho., Johnston,"De-Noising by Soft Thresholding", IEEE Trans. on Information Theory, Vol. 41(3), pp. 613-627,1995.
[7] Sachin.P.Nanavati and Prasanta.K.Panigrahi, "Wavelet Transform A New Mathematical microscope", Article, Resonance,March 2004.

ABSTRACT: H.264/AVC(Advanced Video Coding) is a video coding standard of the ITU-T(International Telecommunication Union for Telecommunication Standardization Sector) Video Coding Experts Group and the ISO/IEC(International Standards Organization/International Electrotechnical Commission) Moving Pic- ture Experts Group. The main goals of the H.264/AVC standardization effort have been enhanced compression performance and provision of a network friendly video representation ad- dressing conversational (video telephony) and no conversational (storage, broadcast, or streaming) applications. H.264/AVC has achieved a significant improvement in rate-distortion efficiency relative to existing standards. This article provides an overview of the technical features of H.264/AVC, describes profiles and applications for the standard, and compared it with H.261 and H.263. Keywords: Advanced video coding (AVC),intraprediction, interprediction.

[1] Overview of the H.264/AVC Video Coding Standard- ThomasWiegand, Gary J. Sullivan, Senior Member, IEEE, Gisle Bjntegaard, and Ajay Luthra, Senior Member, IEEE , IEEE transactions on circuits and systems for video technology, vol. 13, no. 7, July 2003.
[2] Signal Processing: Image Communication 19 (2004) 793849 Video coding using the H.264/MPEG-4 AVC compression standard Atul Puria, Xuemin Chenb, Ajay Luthrac.
[3] The H.264 advance video compression standard Second Edition Iain E. Richardson Vcodex Limited, UK,A John Wiley and Sons, Ltd., Publication 2010.
[4] Performance comparison of the emerging H.264 video coding stan- dard with the existing standards Nejat Kamaci, Yucel Altunbasak Center for Signal and Image Processing Georgia Institute of Tech- nology, Atlanta, GA, USA 2003.
[5] Kalva, H. (2006): The H.264 video coding standard, IEEE mul- timedia, 13(4), pp. 86–90.
[6] Marpe, D. and Wiegand, T. and Sullivan, G.J. (2006): The H.264/MPEG4 advanced video coding standard and its applica- tions: IEEE Communications Magazine, 44(8), pp. 134-143.

ABSTRACT: This brief presents a novel pipelined architecture for low-power, high-throughput, and low-area implementation of adaptive filter based on distributed arithmetic (DA). The throughput rate of the proposed design is significantly increased by parallel lookup table (LUT) update and concurrent implementation of filtering and weight-update operations. The DA-based inner-product computation by conditional signed carry-save accumulation is replaced with CSA Binary to Excess-1 Converter (BEC) in order to reduce the sampling period and area complexity. Reduction of power consumption is achieved in the proposed design by using a fast bit clock for carry-save accumulation but a much slower clock for all other operations. It involves the same number of multiplexors, smaller LUT, and nearly half the number of adders compared to the existing DA-based design.

Index Terms: Adaptive filter, binary to excess-1 convertor(BEC) circuit optimization, distributed arithmetic (DA), least mean square (LMS) algorithm.

[1] S. Haykin and B. Widrow, Least-Mean-Square Adaptive Filters. Hoboken, NJ, USA: Wiley, 2003.
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[3] D. J. Allred, H. Yoo, V. Krishnan, W. Huang, and D. V. Anderson, "LMS adaptive filters using distributed arithmetic for high throughput," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 52, no. 7, pp. 1327–1337, Jul. 2005.
[4] R. Guo and L. S. DeBrunner, "Two high-performance adaptive filter implementation schemes using distributed arithmetic," IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 58, no. 9, pp. 60 Sep. 2011.
[5] R. Guo and L. S. DeBrunner, "A novel adaptive filter implementation scheme using distributed arithmetic," in Proc. Asilomar Conf. Signals,Syst., Comput., Nov. 2011, pp. 160–164.
[6] P. K. Meher and S. Y. Park, "High-throughput pipelined realization of adaptive FIR filter based on distributed arithmetic," in VLSI Symp. Tech. Dig., Oct. 2011, pp. 428–433.
[7] M. D. Meyer and P. Agrawal, "A modular pipelined implementation of a delayed LMS transversal adaptive filter," in Proc. IEEE Int. Symp. Circuits Syst., May 1990, pp. 1943–1946.

ABSTRACT: This paper discusses the image enhancement techniques by a hardware custom processor implemented on FPGA using VERILOG Hardware Description Language. Using the moving window filter mechanismthe processor will perform Low Pass Filtering (Smoothening), High Pass Filtering (Sharpening), High Boost Filtering (Edge-Detection) and Zooming. We use grayscale image to demonstrate the effectiveness of the processor. The processor achieves image enhancement in spatial domain through Neighborhood processing operations. The hardware processing of the image is advantageous in terms of speed of operation and parallel processing as against classical software simulations.

Keywords:Digital Image Processing, Image Enhancement Technique, NeighborhoodProcessing, Moving Window Filter, VERILOG, FPGA.

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