iosr-JVSP   Volume-8 ~ Issue-2 ~ March-April 2018

ABSTRACT: An Energy Efficient Multiplier Is Proposed And Implemented With Less Area, Minimum Delay, And Less Amount Of Power Dissipation. The Left To Right Truncated Multiplier Was Proposed Earlier. In That Design, N-Bit Multiplier Produces 2N Bit Partial Products, But These 2N Bit Partial Products Will Be Divided Into 2N-(N/2) Bits And N/2 Bits. Thus Finally 2N Bits Are Produced By Addition Of Above Bits Using Ripple Carry Adder. The Proposed Multiplier Was Implemented Without Any Truncation And Addition Method, And Designed As A General Array Multiplier Structure. A Smaller On-The-Fly Conversion (OTFC) Circuit Is Added At The End Of The Circuit............

Keywords: Addition, On-The-Fly Conversion, Left-To-Right Multiplier, Right-To-Left Multiplier, Truncation

[1]. Wen Yan, Milos D. Ercegovac, He Chen "An Energy Efficient Multiplier With Fully Overloaded Partial Products Reduction And Final Addition "" IEEE Trans. Circuits Syst. I, Regular Papers Express Briefs, 2016.
[2]. H. J. Ko And S. F. Hsiao, "Design And Application Of Faithfully Rounded And Truncated Multipliers With Combined Deletion, Reduction, Truncation, And Rounding," IEEE Trans. Circuits Syst. II, Express Briefs, Vol. 58, No. 5, Pp. 304–308, 2011.
[3]. S. Das And S. P. Khatri, "Generation Of The Optimal Bit-Width Topology Of The Fast Hybrid Adder In A Parallel Multiplier," In Proc. IEEE Int. Conf. Integr. Circuit Des. Technol., Pp. 1–6, May 2007.
[4]. M. D. Ercegovac And T. Lang, "On-The-Fly Conversion Of Redundant Into Conventional Representation," IEEE Trans. Comput., Vol. C-36, No. 7, Pp. 895–897, 1987.
[5]. A. Vazquez And E. Antelo, "Area And Delay Evaluation Model For CMOS Circuits," Internal Report, Univ. Santiago De Compostela (Spain), Jun. 2012.

ABSTRACT: In this paper, the impact of GaN-based High Electron Mobility Transistor (HEMT) is reported. The device is having two channel layers of GaN (Gallium Nitride) and InAlGaN (Indium Aluminium Gallium Nitride). The device is simulated by the TCAD, Silvaco Software in 2D format. The results so obtained have proved the high performance on the parameters like electric potential, concentration of electron, break-down voltage and transconductance (gm). The simulated device and obtained results are compared with the structure of AlGaN/GaN HEMT. The major benefit of the simulated device is the reduced leakage current. The mole fraction of Aluminium in InAlGaN has been optimized to create the best performing device.

Keywords: Mole Fraction, GaN/AlGaN, Breakdown Voltage, High Electron Mobility Transistor (HEMT)

[1] https://en.wikipedia.org/wiki/Gallium_nitride
[2] Siert, P. and Krimmel, E, (2004) Silicon: Evolution and Future of a Technology.Springer, Berlin.
[3] Adler, M., Owyang K.B., Baliga, B.J. and Kokosa, R. (1984) The Evolution of Power Device Technology. IEEETransactions on Electron Devices, 31, 1570-1591. https://doi.org/10.1109/T-ED.1984.21754
[4] Yole Développement (2014) Wide Band Gap Power Electronics: A Path toward CO2 Emission Decrease. Technical Report, Yole Développement, Villeurbanne.
[5] Ozpineci, B., Tolbert, L.M.S., Islam, K. and Chinthavali, M. (2003) Comparison of Wide Bandgap Semiconductors for Power Applications. European Conference on Power Electronics and Applications, Toulouse, 2-4 September 2003, 2-4.

ABSTRACT: There are many methods available for secret data hiding and transfer, among which steganography stands out in various aspects. Steganography is used for secret data transfer in a cover object which may be an image, video, audio, text or a network protocol, with an additional advantage of even hiding the existence of such a secret data. Selfies are commonly trending via social media nowadays and can be utilized for image steganography in many cases. A study of face detection using Viola-Jones object tracking method and then embedding secret image into it based on Discrete Wavelet Transform(DWT) technique is executed in MATLAB. Finally, using the steganographic characteristics such as the MSE (Mean Square Error) and PSNR (Peak Signal-to-Noise Ratio) values, the different input cover image formats like JPG, PNG, BMP with secret images of JPG, BMP, PNG formats are analyzed..

Keywords: Discrete Wavelet Transform(DWT), MSE (Mean Square Error), PSNR (Peak Signal-to-Noise Ratio) Steganography, Viola-Jones object tracking method

[1]. C.P. Sumathi, T. Santanam, G. Umamaheswari,"A Study of VariousSteganographic Techniques Used for Information Hiding". International Journal of Computer Science and EngineeringSurvey(IJCSES), Vol.4, No.6, December 2013.
[2]. ShashikalaChannalli, Ajay Jadhav,"Steganography- An art of Hiding Data". International Journal on Computer Science and Engineering, Vol.1(3), 2009, 137-141.
[3]. T. Morkel,J.H.P. Eloff, M.S. Olivier, "An Overview of Image Steaganography". Information and Computer Security Architecture (ICSA) Research Group Department of Computer Science University of Pretoria, 0002, Pretoria, South Africa.
[4]. SnehalManjare, Dr.S.R.Chougule, "Steganography using Concept of Skin Tone Detection". International Journal of Scientific Research Engineering & Technology (IJSRET), Volume 2 Issue4 pp 189-193 July 2013.
[5]. ManishaKude, ManjushaBorse, "Skin tone Detection Based Steganography Using Wavelet Transform", International Conference on Automatic Control and Dynamic Optimization Techniques(ICACDOT), 2016..

ABSTRACT: Online handwriting recognition or character recognition is the process in which a handwritten message is recognized by processing the handwritten data. It is the process of converting handwritten characters to machine format. In handwriting, the strokes are composed of two coordinate trace in between pen down and pen up labels. Wide range of features is extracted to perform the recognition. Many research works have been done for English, Japanese, Chinese and Korean languages. During the past decade a vast amount of research has also been done on some Indian scripts, viz., Malayalam, Telugu, Devanagari, Gurumukhi, Hindi, Bangla, Assamese, etc. The work presented in this paper deals with the various processes taken up by the researchers in recognizing of the handwriting of various scripts. In this paper, a detailed study of various methods and classifiers used by the researchers to recognize the scripts are made. The comparison of accuracy obtained in different methods is also presented.

[1] T. R. Indhu and V. K. Bhadran, "Malayalam online handwriting recognition system: A simplified fuzzy ARTMAP approach", 2012 Annual IEEE India Conference (INDICON), Kochi, 2012 pp. 613-618.
[2] G. A. Fink, S. Vajda, U. Bhattacharya, S. K. Parui and B. B. Chaudhuri, "Online Bangla Word Recognition Using Sub-Stroke Level Features and Hidden Markov Models",2010 12th International Conference on Frontiers in Handwriting Recognition, Kolkata, 2010, pp. 393-398 .
[3] Deepjoy Das, RituparnaDevi,SRMPrasanna, SubhankarGhosh, Krishna Naik. , "Performance Comparison of Online Handwriting Recognition System for Assamese Language Based on HMM and SVM Modelling", Computer Science and Information Technology,2014
[4] S.Jaeger, S. Manke, J. Reichert,A.Waibel , "Online handwriting recognition: the NPen++ recognizer", Interactive Systems Laboratories, University of Karlsruhe, Computer Science Department, Interactive Systems Laboratories, Carnegie Mellon University,School of Computer Science, Pittsburgh, USA, 2000
[5] Abhimanyu Kumar and SamitBhattacharya , "Online Devanagari isolated character recognition for the iPhone using Hidden Markov Models", 2010 IEEE Students Technology Symposium (TechSym), Kharagpur, 2010, pp. 300-304.

ABSTRACT: Undesired abnormal growth of cells in the brain is a serious neurological problem which is known as brain tumor. Early detection and diagnosis of tumor from an MRI image is a primary task. It is tedious and time consuming task which requires expertise of radiologists. To overcome this limitation, an automated state-of-the-art system is required which can give an estimate about whether the brain MRI image has tumor or not. The literature reveals that feature extraction is a significant step for detection of tumor. In this study, feature extraction is incorporated with significant feature identification so as to minimize the time required for processing the data and to improve the accuracy. This paper presents a technique for statistical feature extraction by hybridization of analytical and algorithmic means and Gray Level Cooccurrence Matrix (GLCM) properties. This gives a..........

Index Terms—Brain tumor, Magnetic resonance imaging (MRI), feature extraction

[1] Brijesha D. Rao and Mukesh M. Goswami, "A Comprehensive Study of Features used for Brian Tumor Detection and Segmentation from MR Image," International Conference on Innovations in Power and Advanced Computing Technologies [i-PACT2017]
[2] Nilesh Bhaskarrao Bahadure, Arun Kumar Ray, and Har Pal Thethi "Image Analysis for MRI Based Brain Tumor Detection and Feature Extraction Using Biologically Inspired BWT and SVM", International Journal of Biomedical Imaging vol. 2017 (2017), Article ID 9749108, 12 pages
[3] https://www.diffen.com/difference/CT Scan vs MRI
[4] http://casemed.case.edu/clerkships/neurology/Web%20Neurorad/MRI% 20Basics.htm
[5] S. Lal and M. Chandra, "Efficient algorithm for contrast enhancement of natural images, International Arab Journal of Information Technol- ogy, vol. 11, no. 1, pp. 95102, 2014.

ABSTRACT: Flip-flops and latches are the most considerable storage elements used in many VLSI circuits. They are gaining more importance in designing shift register, which has many applications now a days. In this paper, shift register is implemented using PULSED LATCH circuit. The pulsed latch circuit is driven by the pulsed clock signal, generated by the pulse generation circuit. By using the pulsed clock signal, clock power is very much reduced, thereby reducing the overall power consumption. Among different pulsed latch circuits like Modified Hybrid Latch Flip-Flop (MHLFF) and Transmission Gate Pulsed Latch (TGPL), the Static Differential Sense Amplifier Shared Pulsed Latch(SSASPL) which has low power and less delay is chosen to design 512-bit shift register in TANNER EDA tool using 180nm technology.

Index Terms—Pulsed latch, flip-flop, shift register.

[1]. Wael M. Elsharkasy, Amin Khajeh, , Ahmed M. Eltawil, and Fadi J. Kurdahi, "Reliability Enhancement of Low-Power Sequential Circuits Using Reconfigurable Pulsed Latches," IEEE Trans. on circuits and systems,Vol.64, issue: 7, Nov.2017.
[2]. Byung-Do Yang, "Low-Power and Area-Efficient Shift Register Using Pulsed Latches," IEEE Trans. on circuits and systems, Vol.62, No.6, June 2015.
[3]. V. Stojanovic and V. Oklobdzija, "Comparative analysis of master-slave latches and flip-flops for high-performance and low-power systems," IEEE J. Solid-State Circuits, vol.34, no 4, pp.536-548, Apr 1999.
[4]. SudhaKousalya and G.V.R.Sagar , "Low Power Pulsed Triggered Flip-Flop Design with Conditional Pulse Enhancement Method," IOSR Journal of VLSI and Signal Processing(IOSR-JVSP) Vvolume5, Issue 4, pp. 49-56, Jul-2015.
[5]. H. Partovi et al., "Flow-through latch and edge-triggered flip-flop hybrid elements," IEEE Int. Solid-State Circuits Conf.(ISSCC) Dig. Tech. papers, pp. 138-139, Feb. 1996.

ABSTRACT: Speech of human beings is the reflection of the state of mind. Proper evaluation of these speech signals into stress types is necessary in order to ensure that the person is in a healthy state of mind. In this work we propose a SVM classifier for speech stress classification algorithm, with sophisticated feature extraction techniques as Mel Frequency Cepstral Coefficients (MFCC). The SVM algorithm assists the system to learn the speech patterns in real time and self-train itself in order to improve the classification accuracy of the overall system. The proposed system is suitable for real time speech and is language and word independent.

Index Terms: Support Vector Machines, MFCC, Stress Classification, Feature Selection.

[1]. Schuller, Bjorn, et al., Recognising realistic emotions and affect in speech: State of the art and lessons learnt from the first Challenge. Speech Communication 53.9 (2011): 1062-1087.
[2]. Anagnostopoulos, Christos-Nikolaos, Theodoros Iliou, and Ioannis Giannoukos, Features and classifiers for emotion recognition from Speech: a survey from 2000 to 2011, Artificial Intelligence Review 43.2 (2015): 155-177.
[3]. Joshi, Dipti D., and M. B. Zalte, Speech Emotion Recognition: A Review, Journal of Electronics and Communication Engineering (IOSR-JECE) 4.4 (2013).
[4]. Ververidis, Dimitrios, and Constantine Kotropoulos, Emotional speech recognition: Resources, features, and methods, Speech communication 48.9 (2006): 1162-1181.
[5]. El Ayadi, Moataz, Mohamed S. Kamel, and Fakhri Karray, Survey on speech emotion recognition: Features, classification schemes, and databases, Pattern Recognition 44.3 (2011): 572-587

ABSTRACT: In this paper, the latest standards of video-coding H.265/HEVC is designed with highly efficient video decoder. The contrary decoding techniques are brought to bear at various stages to emend the data throughput and coding efficiency. The priority based heading one detector is used to the efficiency of decoder. Simulation and synthesis is done by Xilinx 14.7 ISE and implemented on Virtex5 FPGA. The simulation result shows the computational period of decoder architecture is scale down with optimized power reduction and speed.

Index Terms: Baseline Decoder, CAVLC Decoder, Heading one detector, H.265/HEVC, priority Detector.

[1]. B. Bross. W. J. Han, G. J. Sullivian, J,-R Ohm and T. Wiegand "high efficiency video coding (HEVC) text specification Draft 9" Document JCTVC-K1003, ITU-T/ISO/IEC joint collaborative team on video Coding (JCT-VC), Oct. 2012
[2]. Ke Xu, Chiu-Sin Choy, et. al "Priority based heading one detector in H.264/AVC decoding" EURASIP Journal on Embedded Systems, Volume 2007, Article ID 60834, 7 pages.
[3]. Ke Xu, Chiu-Sin Choy, "Low-power H.264/AVC baseline decoder for portable applications", ISLPED'07, August 27-29, 2007, Portland, Oregon, USA.
[4]. Yi Wang, Xiuqin Su, "A novel design of high throughout hardware implementation for video decoding based on H.264",
[5]. Y.W.Huang, B.Y.Hsieh, T.C.Chen, L.G.Chen, "Analysis, fast algorithm, and VLSI Architecture Design for H.264/AVC intra Frame Coder", IEEE transaction on circuits and systems for video technology, Vol. 15, pp.378-401, March 2005.Jiont Vedio Team (JVT) reference software JM9.4[online]. Available: http:// iphome.hhi.de/suehring/tml/download/.

ABSTRACT: To develop the real world computer vision system, detection of moving objects in video images is very important. The automatic detection of moving objects in video images is very important. The automatic detection of moving objects in monitoring system needs efficient algorithms. The common method is simple background subtraction i.e. to subtract current image from background. But it can't detect the difference when brightness difference between moving objects and background is small. The other approach is to use some algorithms such as color based subtraction technique but the costs are very high and have problem in stability. Here a method is proposed to detect moving objects using difference of two consecutive frames. The objective is to provide a software that can be used on a pc for...........

Index Terms: Video, Frames extraction, Image Enhancement, Object Tracking and detection ,Suspicious objects.

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[5]. Frost, R., Hafiz, R. and Callaghan, P. (2007) "Modular and Efficient Top-Down Object detection for Ambiguous Left-Recursive Grammars." 10th International Workshop on Object detection Technologies (IWPT), ACL- SIGPARSE, Pages: 109 - 120, June 2007, Prague..

ABSTRACT: In DSP systems, due to demand in the higher computational performance in the architecture's is increasing the complexity. In order to enhance the performance, the approximate arithmetic circuits are designed with small errors to increase the speed. The main aim of this work is to approximate the multiplication process with low power consumption. In this paper, a retime low power approximate multiplier is proposed. The approach is based on rounding the operands to the nearest exponent of two. Using this approach, the computational intensive part of multiplication is omitted and thus improving the speed of the multiplier at the cost of small penalty errors. This proposed approach is appropriate for both signed and unsigned operations. The efficiency of the proposed Retime approximate multiplier is analyzed by FIR filter using cross correlation method in image sharpening and smoothing.

Index Terms: Approximate Multiplier, Retime Rounding number, Finite Impulse Response (FIR)

[1]. M. Alioto, "Ultra-low power VLSI circuit design demystified and explained: A tutorial," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 59,no. 1, pp. 3–29, Jan. 2012.
[2]. V. Gupta, D. Mohapatra, A. Raghunathan, and K. Roy, "Low-power digital signal processing using approximate adders," IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 32, no. 1, pp. 124–137, Jan. 2013.
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