iosr-JEEE   Volume-9 ~ Issue-1 ~ Jan-Feb 2014

Abstract: The microcontroller Based Security System with Intruder Position Display is a design that applies automated security system in homes, Industries, military etc. The project will feature a system that will track the presence of an intruder in restricted area and also inform the user about the position of the intruder. This Project will be based on microcontroller and other electronic design to achieve the above stated purposes. The interfacing medium will make use of parallel port. The sensors (Light Dependent Resistor and LEDS) will receive the signal when the intruder is around while the control program will translate the received signal from the sensors to useful information about the function of the system.

[1]. Mitra Thakur, Enhanced Password Based Security System Based on User Behavior using Neural Networks, I.J. Information Engineering and Electronic Business, 2012, 2, 29-35, Published Online April 2012 in MECS (http://www.mecs-press.org/),DOI: 10.5815/ijieeb.2012.02.05.
[2]. Ramesh bharadwaj, DEVELOPMENT OF HIGH-ASSURANCE DISTRIBUTED SYSTEMS, .,2nd international workshop on requirements engineering for high assurance systems(rhas'03) ,september9, 2003.monterery bay , California,usa.in conjection with the 11th IEEE international requirements engineering conference.
[3]. Belone Schilling, Electronic Circuits: Discrete and Integrated, McGraw-Hill, New York,1979.
[4]. B.L Theraja and A.K Theraja, A Textbook on Electrical Technology, 2003, 23rd Edition, Pp 1887 – Pp 1888.

Abstract: The need for strict security measures has been necessary since the beginning of time. Access to certain places and items need strict restrictions to only the privileged few. This restricted zone can vary from strong holds and safes in financial institutions to doors leading to restricted areas. The various innovations in security access system include; code based lock, keycard lock, thumb print scan, retina scan. They come in handy in security systems. Code based locking system is best suited in most applications because of its simplicity and reliability.

[1]. Belone Schilling, Electronic Circuits: Discrete and Integrated, McGraw-Hill, New York,1979.
[2]. B.L Theraja and A.K Theraja, A Textbook on Electrical Technology, 2003, 23rd Edition, Pp 1887 – Pp 1888.
[3]. Paul Horowitz and Windfield Hill, The Art of Electronics, 1989, 2nd Edition, Pp 7- Pp 8, Pp 55 – Pp 58, Pp 614 –Pp 622.
[4]. Atmel Corporation Data Sheet on AT89C51, 0285D-B-12/97
[5]. NTE Electronics Inc., ECG Data Book, January 2002, 10th Edition.
[6]. Giorgio Rizzoni, Principles of Electrical Engineering, 2003, 3rd Edition

Abstract: This paper describes an approach to harvest electrical energy from a mechanically excited piezoelectric element. The structure of piezoelectric energy harvester is optimized for maximum power with minimum dimensions through Genetic Algorithm approach to enhance the conversion of mechanical energy into electrical energy using direct piezoelectric effect. Numerical analysis is carried out to obtain optimal PZT position on the cantilever beam to get maximum harvested power. A rectifier with boost converter IC is used for converting harvested power in to usable DC power. The simulation results are verified experimentally.

Keywords: Energy harvester, FEM analysis, Genetic Algorithm, Optimization, Piezoelectric.

[1] Marco Ferrari, Vittorio Ferrari, Michele Guizzetti and Daniele Marioli, "An autonomous battery less sensor module powered by
piezoelectric energy harvesting with RF transmission of multiple measurement signals", Smart materials and
Structures.18(2009), pp.1-9.
[2] Vinod R Challa, M G Prasad and Frank T Fisher, "Towards an autonomous self-tuning vibration energy harvesting device for
wireless sensor network applications", Smart materials and Structures. 20 (2011), pp.1-11.
[3] Ramadass Y.K. and A. P. Chandrakasan, "An efficient piezoelectric energy harvesting interface circuit using a bias-flip rectifier and
shared inductor", IEEE J. Solid State Circuits, vol. 45 (2010), no. 1, pp. 189–204.
[4] Anton S.R. and H.A. Sodano, "A review of power harvesting using piezoelectric materials (2003–2006)", Smart materials and
Structures. 16 (2007), pp. R1–R21.
[5] N.G. Stephen, "On energy harvesting from ambient vibration", Journal of Sound and Vibration 293 (2006) 409–425.
[6] Thiago Seuaciuc-Osorio, Mohammed F. Daqaq, "Energy harvesting under excitations of time-varying frequency", Journal of Sound
and Vibration 329(2010)2497–2515.
[7] Khaligh A., P. Zeng, and C. Zheng, "Kinetic energy harvesting using piezoelectric and electromagnetic technologies-State of the
art", IEEE Transactions, Industrial Electronics, vol. 57 (2010), no. 3, pp. 850–860.

Abstract: In this paper an attempt has been made to control frequency deviations using Particle Swarm Optimization in a two area system. And PSO technique has been used to optimize the parameters of TCPS and SMES. Here TCPS is installed in series with Tieline in coordination with SMES. There is the comparative study of transient response and tie-line deviation of the system with and without optimized TCPS and SMES. The proposed frequency scheme is improved by using PSO optimized SMES and TCPS.

Keywords: Automatic Generation Control (AGC), Particle Swarm Optimization (PSO), Automatic Load frequency control (ALFC), Super conducting magnetic energy storage system (SMES), Thyristor controlled phase shifter(TCPS).

[1] HasanBevrani&TakashiHiyama,japan-IntelligentAutomatic Generation Control.Taylor& francis gp publishing co. -2011
[2] Dr.SandeepBhongade,profH.O.Gupta senior member IEEE-Performance of SMES unit on Artificial Neural Network based multi
area AGC scheme.journal of power electronics & power system.Vol-1.March-2011.
[3] Mohd.Hassan Ali senior member IEEE-An overview of SMES application in energy & power system, Vol. No.1-2010.
[4] Demiroren "Application to self tunning to Automatic Generation Control in power system including SMES unit" ,Newyork.2009
[5] S.P.GhoshalDept of Electrical Engg NIT Durgapur-Optimized AGC by SSSC & TCPS in coordination with SMES for two area
HydroHydro power system.International Conference on advances incomputing,Control&telecommunicationtechnologie.2009

Abstract: There are many problems arising in the electrical networks. In that, voltage fluctuation and power loss reduction becomes a major drawback in the electrical power supply system. Hence it is necessary to enhance the system power flow by placing suitable facts devices. The placement of FACTS devices in suitable location can lead to control the flow of current and maintain bus voltages in desired level and reduce the losses. The facts devices like Upfc, Ipqc, Dpfc are compared with each other and the higher efficiency converter is identified. Finally, the location for better efficiency is traced out. Back-to-back connection between the shunt and series converters is given for the control capability of UPFC, which allows the active power to freely exchange. UPFC has a DC link whereas DPFC does not have any DC link. It is connected directly to the transmission line to control the hysteresis loss. Optimal location and better efficiency of UPFC, IPQC and DPFC are found out and the devices are placed at the exact location. This project presents one of the Bang-Bang Controller to seek the optimal location of FACTS devices in a power system Proposed algorithm is tested on IEEE 14 bus power system for optimal location of multi-type FACTS devices and the results are presented.
Keywords: Bang-Bang control technique, Distributed Power Flow Controller (DPFC), FACTS (Flexible AC Transmission System), Improved Power Quality Controller (IPQC),Optimal location, Unified Power Flow Controller (UPFC).

[ 1 ] N. G. Hingorani, ―FACTS technology—State of the art, current challenges and the future prospects,‖ in Proc. IEEE Power Eng. Soc. Gen.Meeting, Jun. 24–28, 2007, pp. 1–4.
[ 2 ] W. J. Lyman, ―Controlling power flow with phase-shifting equipment,‖AIEE Trans., vol. 49, pp. 825–831, Jul. 1930.
[ 3 ] Z. Han, ―Phase-shifter and power flow control,‖ IEEE Trans. PowerApp. Syst., vol. PAS- 101, no. 10, pp. 3790–3795, Oct. 1982.
[ 4 ] M. Noroozian and G. Anderson, ―Power flow control by use of controllable series components,‖ IEEE Trans. Power Del., vol. 8, no. 3,pp. 1420–1429, Jul. 1993.
[ 5 ] Y. H. Song and A. T. Johns, Flexible A.C. Transmission Systems (FACTS). London, U.K.: Inst. Elect. Eng.,1999.

Abstract: This paper presents a novel grid-connected boost-full-bridge photovoltaic (PV) micro-inverter system and its control implementations. The concept of micro-inverter is a future trend for grid connected Photovoltaic micro-inverter. Increasing demand on the renewable energy sources has made the grid connected inverter systems to be more important than ever before. Maximum Power Point Tracking (MPPT) technique is implemented which is used by the grid connected inverters to get the maximum possible power from one or more photovoltaic devices, typically solar panels. Z source network is used to get the steady state. Interleaving of the Boost DC-DC converter is carried out to get more boost up voltage and better efficiency. A new multilevel inverter topology constituting of a H-bridge structure with four switches connected to the dc link. Based on Phase Opposition Disposition technique a new PWM method requires only one carrier signal is suggested.
Keywords: Boost-Full-Bridge, Grid-connected photovoltaic (PV) system, Incremental Conductance (IncCond), Maximum Power Point Tracking (MPPT), Photovoltaic micro-inverter, Phase Opposition Disposition technique (POD).

[ 1 ] S. B. Kjaer, J. K. Pedersen, and F. Blaabjerg, "A review of single-phase grid-connected inverters for photovoltaic modules," IEEE Trans. Ind. Appl., vol. 41, no. 5, pp. 1292–1306, Sep./Oct. 2005.
[ 2 ] Q. Li and P.Wolfs, "A review of the single phase photovoltaic module integrated converter topologies with three different DC link configurations," IEEE Trans. Power Electron., vol. 23, no. 3, pp. 1320– 1333, May 2008.
[ 3 ] R. Wai and W. Wang, "Grid-connected photovoltaic generation system," IEEE Trans. Circuits Syst.-I, vol. 55, no. 3, pp. 953–963, Apr. 2008.
[ 4 ] M. Andersen and B. Alvsten, "200W low cost module integrated utility interface for modular photovoltaic energy systems," in Proc. IEEEIECON, 1995, pp. 572–577.
[ 5 ] A. Lohner, T. Meyer, and A. Nagel, "A new panel-integratable inverter concept for grid-connected photovoltaic systems," in Proc. IEEE Int. Symp. Ind. Electron., 1996, pp. 827–831.

Abstract: Radio communication has highest energy consumption. To reduce the energy and power parallel prefix technique is used. This paper describes the design and implementation of newly proposed folded tree architecture. Folded tree architecture has two phases. They are trunk and twig phase. Normally the power is reduced to 60-70% compared to existing methods. Measurements of the silicon implementation show an improvement of 10-20 × in terms of energy as compared to traditional modern micro controllers found in sensor nodes. Commonly this technique is used to wireless communication.
KeyWords: Parallel prefix, Radio Communication, Wireless communication, Folded tree.

[1] Agrawal.B, Chong.F.T, Mysores.S and Sherwood.T,"Exploring the processor and ISA design for wireless sensor network applications",inProc. 21th Int. Conf. Very-Large-Scale Integer. (VLSI) Design, pp. 59–64, 2008.
[2] Backus.J, "Can programming be liberated from the von neumann style?", in Proc. ACM Turing Award Lect., pp. 1–29,1997.
[3] Blelloch. "Scans as primitive parallel operations,‟ IEEE Trans. Comput., vol. 38, no. 11, pp. 1526–1538,1987.
[4] Blelloch G.E ""Prefix sums and their applications", Carnegie Mellon Univ., Pittsburgh, PA: USA, Tech. Rep. CMU-CS-90,1990.
[5] Ekanayake V.N, Kelly.C, and Manohar.R , "SNAP/LE: An ultra-lowpower processor for sensor networks", ACM SIGOPS Operat. Syst. Rev.- ASPLOS, vol. 38, no. 5, pp. 27–38,2004.

Abstract: Numerous efforts in balancing the trade-off between power, area and performance have been done in the medium performance, medium power region of the design spectrum. However, not much study has been done at the two extreme ends of the design spectrum, namely the ultra-low power with acceptable performance at one end and high performance with power within limit at the other. One solution to achieve the ultra-low power requirement is to operate the digital logic gates in sub-threshold region. In this paper, we investigate different logic families in sub-threshold region for ultra-low-power applications. For the first time, the performance characteristics of inverter and also the basic gates for different logic families operating in the sub-threshold region have been compared using 90nm technology cadence circuit simulations. The results of the simulations show that the sub-threshold logics have some advantages compared to their strong inversion counterparts. Enhancing the performance of these circuits will leads to enhancement of overall system performance.
Keywords: circuit simulation, Digital logic gates, Medium performance, Sub-threshold region, Ultra low power design.

[1] A. Chandrakasan, R. Brodersen, "Low Power Design", Kluwer Academic Publishers, 1995.
[2] Saradindu Panda1, A.Banerjee2 B.Maji3, Dr.A.K.Mukhopadhyay "Power and Delay Comparison in between Different types of Full Adder Circuits" International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering Vol. 1, Issue 3, September 2012.
[3] J. Frenkil, "A Multi-Level Approach to Low-Power IC Design", in IEEE Spectrum, volume 35, pp. 54{60, February 1998.
[4] "Digital CMOS logic operation in the sub-threshold region," in Tenth Great Lakes Symp. VLSI, Mar. 2000, pp. 107–112.
[5] A. P. Chandrakasan et al., "Low-power CMOS digital design," IEEE J. Solid State Circuits, vol. 27, pp. 473–484, Apr. 1992.