iosr-JVSP   Volume-4 ~ Issue-2 ~ March-April 2014

ABSTRACT: In present day technology there is an immense need of developing suitable data communication interfaces for real time embedded systems. Field Programmable Gate Array (FPGA) offers various resources, which can be programmed for building up an efficient embedded system. In recent years the SOC (System on Chip) design eg, in media processing [1] is becoming more and more important in real time embedded applications as SOCs require low power, low area but are still capable of implementing various complex functionalities. In order to achieve SOC architecture, which can run a real time application, we need to develop high-speed data interfaces of the system with the external world through its various I/O ports. The DMA controller, which sends the data from I/O to memory and vice-versa without intervention of the processor, thus plays a vital role in these systems in order to achieve faster I/O data transfer. This paper proposes a technique to implement a DMA controller core on Spartan 3A FPGA hardware, which serves as an essential component for developing a real time data acquisition and processing system.

Keywords: FPGA, EDK, DMA controller, ADC, DAC

[1] Keming Chen, Lingling Qi, Haibin Yu- DOI 10.1109/IITA.2008.493- "Design of Two-Dimension DMA controller In Media Multi-Processor SoC".
[2] Suman Sau, Chandrajit Pal, Amlan Chakrabarti- "Design and Implementation of Real Time Secured RS232 Link for Multiple FPGA Communication".
[6] Implementation of High Speed Real Time Data Acquisition and Transfer System.
[7] An Improved DMA Controller for High Speed Data Transfer in MPU Based SOC.

ABSTRACT: The purpose of this project is to design the system which monitors the various parameter about the leather e.g. area, pattern and cut or hole detection in the leather. Leather is placed on conveyor belt fixing the background color of belt and then area of the irregular shaped leather is calculated using image processing and 2nd case is if leather is regular or fix shaped then its pattern and whatever cuts or holes on the plane surface is detected using image processing only.

Keyword: Conveyor belt, Gray scale, Binary image, Pattern

[1] Mr. B. Barker, "Photographs by Enid Sheldon from the 1980's,"http://www.otley.co.uk/gallery/sheldon/industries/leather/index.htm,24 May. 2008.
[2] J.W. Kwon; Y.Y. Choo; H.H. Choi; J.M. Cho; G.S. KiI,"Development of leather quality discrimination system by texture analysis", TENCON 2004. 2004 IEEE Region 10 Conference pp.327- 330 Vol. 1, 21-24 Nov. 2004.
[3] R. Muhammad, F. Faizan, M. Shoaib, T. Qadri "Irregular surface area measuring instrument" in 2nd International Conference on Education Technology and Computer, v 1, p V156-V159, June 22- 24.
[4] Yi, J., Wang, D., Zhou, J. " Impact of box ratio and pinwheel pattern on the pallet loading problem" Journal of Southeast University pp. 267-270, 2009.

ABSTRACT:A new algorithm is proposed for removing large objects from digital images. The challenge is to fill in the hole that is left behind in a visually plausible way. This has been addressed by two classes of algorithms: (i) "inpainting algorithms" for filling in small image gaps, and (ii) "super resolution" techniques" for creating one enhanced resolution image. This paper presents a novel and efficient algorithm that combines the advantages of these two approaches. We first note that exemplar-based texture synthesis contains the essential process required to replicate both texture and structure; the success of structure propagation, however, is highly dependent on the order in which the filling proceeds. We propose a best-first algorithm in which the confidence in the synthesized pixel values is propagated in a manner similar to the propagation of information in inpainting.

Key Words: exemplar-based inpainting framework, non parametric patch sampling.

[1] Ashikhmin, M, ―Synthesizing natural textures‖, In I3D'01. (2001).
[2] Bertalmio, M., Sapiro, G., Caselles, V., Ballester, C. ―Image inpainting‖, In SIG-GRAPH 2000. (2000).
[3] Chan, T., Shen, J ,―Variational restoration of non-flat image features: models and algorithms‖, SIAM J. Appl. Math. 61 (2001) 1338-1361.
[4] Chang, H., Yeung, D.Y., Xiong, Y., ―Super-resolution through neighbor embedding‖, In Computer Vision and Pattern Recognition Volume I. (2004) 275-282.
[5] Criminisi, A., P´erez, P., Toyama, K, ―Region filling and object removal by examplar- based image inpainting‖, IEEE Trans. On Image Processing 13 (2004) 1200-1212.
[6] Efros, A.A., Leung, T.K, ―Texture synthesis by non-parametric sampling‖, In International Conference on Computer Vision. (1999) 1033-1038.
[7] Freeman,W.T., Jones, T.R., Pasztor, E.C, ―Example-based super resolution‖, IEEE Computer Graphics and Applications 22 (2002) 56-65.

ABSTRACT: As the technology is continuously scaled, leakage currents become a major contributor to the total power dissipation. A reduction in power supply voltage is necessary to reduce dynamic power and avoid reliability problems in deep sub-micron regions. Threshold voltage reduction accompanies supply voltage scaling to maintain the performance but it exponentially increases the sub threshold leakage currents. Domino logic circuits are extensively used in high performance microprocessors due to their superior speed and area characteristics compared to static CMOS circuits. But these circuits are susceptible to high leakage.

[1]. Pandey.K, Mishra.R.A, and Nagaria.R.K. (2013), "Leakage Power Analysis of Domino XOR Gate‟, ISRN Electronics, Article ID 271316, 7 1-7.
[2]. James T. Kao and Anantha P. Chandrakasan (2000), "Dual-Threshold Voltage Techniques for Low-Power Digital Circuits‟, IEEE J. Solid-State Circuits, 35(7) 1009-1018.
[3]. Chua-Chin Wang, Chi-Chun Huang, Ching-Li Lee, and Tsai-Wen Cheng (2008), "A Low Power High-Speed 8-Bit Pipelining CLA Design Using Dual-Threshold Voltage Domino Logic‟, IEEE Trans. on Very Large Scale Integration(VLSI) Systems, 16(5) 594-598.
[4]. Haiyan Ni, Lifang Ye, Jianping Hu (2011), "Dual-Threshold CMOS Technique for Pass-Transistor Adiabatic Logic with PMOS Pull-Up Configuration‟, Future Intelligent Information Systems, Lecture Notes in Electrical Engineering, 86 31-38.
[5]. Charu Rana, Dipti (2011), "Analytical Study of Sleep Switch Dual Threshold CMOS Circuit Techniques for Sub-threshold Leakage Reduction‟, International Journal of Communication Engineering Applications-IJCEA, 2(5) 376-380.

ABSTRACT:The ever increasing demand of digital computing and wireless communication have been driving the semiconductor technology to change with passing days. Modern electronics system integrates more complex component and devices, which result in a very complex electromagnetic field environment Moore's law has driven the scaling of digital electronic devices, dimensions and performances over the last 40 years. In today's world, there is demand of devices which are faster, better and having less power consumption.

[1] M. Bartur and M.A. Nicolet, "Utilization of Nisi, as an Interconnect Material for VLSI", IEEE, 1984.
[2] Hung-Yu Yang and Nicolaos G. Alexopoulos, "Basic Blocks for High-Frequency Interconnects: Theory and Experiment" IEEE Transactions on Microwave Theory and Techniques, Vol. 36, No. 8, August 1988.
[3] D. Jiang, B. L. Bhuva, D. V. Kerns, Jr., and S. E. Kerns "Comparative Analysis of Metal and Optical Interconnect Technology" 0-7803-6327-2/00/$10.00 0 2000 IEEE.
[4] Seiya Isozaki, Takehiro Kimura"Development of Low Cost, Highly Reliable CSP using Gold-Gold Interconnection Technology" 2001 Electronic Components and Technology Conference.
[5] Aric C. Madayag and Zhiping Zhou "Optimization of Spin-On-Glass Process for Multilevel Metal Interconnects" 0-7803-6691-3/01/$10.00 02001 IEEE .

ABSTRACT: CORDIC algorithm provides an efficient way for vector rotation in a plane through a fixed and known angle with high level of accuracy. CORDIC requires only simple shift add operation to estimate the basic elementary functions like trigonometric operations, multiplication, division and some other operations like logarithmic functions, square roots and exponential functions.

[1] Hu .Y. H. andChern.H. H.M,(1996),'A novel implementation of CORDIC algorithm using Backward angle recoding (BAR)', IEEE Trans.Comput., vol. 45, no. 12, pp.1370-1378
[2] Hu. Y. H. and Naganathan.S,(1993), 'An angle recoding method for CORDIC algorithm implementation,'IEEE Trans. Comput., vol.42, no. 1, pp. 99–102
[3] Lin.C. H. and Wu. A. Y, (2005), 'Mixed-scaling-rotation CORDIC (MSRCORDIC) Algorithm and architecture for high-performance vector rotational DSP applications,' IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 52, no. 11, pp. 2385–2396.
[4] Maharatna.K.,Banerjee.S, Grass.E, Krstic. M, and TroyaA. (2005), 'Modified virtually Scaling free adaptive CORDIC rotator algorithm and architecture,'IEEETrans.Circuits Syst. forVideo Technol., vol. 15, no.11, pp. 1463–1474
[5] Meher. P. K, Valls. J, Juang T.-B., Sridharan.K, and Maharatna.K,(2009), '50 years of CORDIC: Algorithms, architectures and applications,'IEEETrans. Circuits Syst. I, Reg. Papers, vol. 56, no. 9, pp. 1893–1907.

ABSTRACT: Image encryption has been crucial for many applications where the secret image consisting of secrete information regarding an application will be embedded in another data preferably image. New technology and new applications bring threat to the information. To provide security to the information with respect to new threats, new algorithms need to be devised. In this paper three techniques for image encryption are proposed. In the first, the secret image will be embedded into least significant bit position of another image called carrier or source image. But the order with which the insertion takes place will be decided by a polynomial, somehow similar to the hash table insertion. In the second, the secret image is hidden in the decomposed data of multimedia data. The first technique is a spatial domain technique, whereas the second is a transform domain technique. In the third, the secret image will be split into share images. The share images will be hidden in another image. By using the above techniques different levels of security is provided to the information.

Keywords: Image encryption, LSB, Multistage encryption, Wavelet domain

[1] Haojiang Gao, Yisheng Zhang, Shuyun Liang, Dequn Li, "A new chaotic algorithm for image encryption", Chaos, Solitons and Fractals, Elsevier 29 (2006) 393–399
[2] Komal D Patel, Sonal Belani, " Image Encryption Using Different Techniques: A Review", International Journal of Emerging Technology and Advanced Engineering, Volume 1, Issue 1, November 2011.
[3] A. Mitra, Y. V. Subba Rao and S. R. M. Prasanna, "A New Image Encryption Approach using Combinational Permutation Techniques", International Journal of Electrical and Computer Engineering 1:2 2006.
[4] Mohammad Ali Bani Younes and Aman Jantan, "Image Encryption Using Block-Based Transformation Algorithm", IAENG International Journal of Computer Science, 35:1, IJCS_35_1_03, 2008.
[5] Anil Kumar Yadav and Ravinder Kumar Purwar, "Complexity Analysis of Image Encryption Technique". UFL & JIITU, IC3–2008.

ABSTRACT: Operational Transresistance Amplifier is important active element in Analog integrated circuits and system. The OTRA is receiving increasing attention as a basic building block in analog circuit design. It is relatively a new building block operating from low voltage supplies and overcomes the finite gain bandwidth product associated with traditional op-amp. The basic principle behind the design of OTRA is to provide amplification of high frequency signals with the using standard operational amplifier. In this work effort is made to study the role of OTRA as an active building block in analog circuits. Various CMOS realization of OTRA present in the literature are studied and these circuits are used to realize various signal processing and generating circuits. Based upon component sensitivity tendency and variation amount, just properly adjusting one or two resistances by a small difference, or giving approximate component values for achieving precise output responses is investigated and developed different OTRA realization.

Keywords: OTRA, CMOS, VLSI.

[1] Ashish Ranjan, Sajal K. Paul., "Voltage-Mode Third Order Band Pass Filter Employing Operational Transresistance Amplifier".5th International conference on computer and devices (CODEC).
[2] Fırat Kacar,Abdullah Yesil., " New CMOS Realization of Voltage Differencing Buffered Amplifier and Its Biquad Filter Applications," Radioengineering, VOL. 21, NO. 1, APRIL 2012.
[3] Alper duru, Hakan Kuntman, "CMOS Differential OTRA Design for the Low Voltage Power Supplies in the Sub- Micron Technologies," Turk J Elec Engin,VOL.13, NO.1 2005.
[4] Khaled N. Salamaa, Ahmed M. Soliman, "CMOS operational Transresistance," Microelectronics Journal 30 (1999) pp.235–245.
[5] Ahmed M.Soliman., "modified CMOS differential operational Transresistance amplifier (OTRA)," Int. J. Electron. Commun. (AEÜ) 63 (2009) pp.1067–1071,24 August 2008.
[6] K.N. Salamaa, A.M. Soliman,"Novel oscillator using the operational Transresistance amplifier," Microelectronics Journal 30 (1999) pp.235–245.