iosr-JVSP   Volume-5 ~ Issue-5 ~ Sep-Oct 2015

ABSTRACT: The most area and power consuming arithmetic operation in high-performance circuits like Finite Impulse Response (FIR), multiplication is one. There are different types of multipliers to reducing the cost and effective parameters in FIR filter design. Among those this paper use truncated multiplier and modified Wallace multiplier in the FIR design. The structural adders and delay elements occupies more area and consumes power in this form so it was a reason to forward the proposed method. In prior FIR filters design with low cost effective results will done by the faithfully rounded truncated multipliers with the carry save additions. In MCMAT design the low cost FIR filters within the best area and power results are implement in this paper by using the improved truncated methods.

[1]. Shen-Fu Hsiao, Jun-Hong Zhang Jian, and Ming-Chih Chen,‖Low-Cost FIR Filter Designs Based on FaithfullyRounded Truncated Multiple ConstantMultiplication/Accumulation‖ieee transactions on circuits and systems—ii: express briefs, vol. 60, no. 5, may 2013.
[2]. M. M. Peiro, E. I. Boemo, and L. Wanhammar, ―Design of high-speedmultiplierless filters using a nonrecursive signed common subexpression algorithm,‖ IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process.,vol. 49, no. 3, pp. 196–203, Mar. 2002.
[3]. C.-H. Chang, J. Chen, and A. P. Vinod, ―Information theoretic approachto complexity reduction of FIR filter design,‖ IEEE Trans. Circuits Syst.I, Reg. Papers, vol. 55, no. 8, pp. 2310–2321, Sep. 2008.
[4]. F. Xu, C. H. Chang, and C. C. Jong, ―Contention resolution—A newapproach to versatile subexpressions sharing in multiple constant multiplications,‖IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 55, no. 2,pp. 559–571, Mar. 2008.

ABSTRACT: Low-Noise Amplifier (LNA), with a broadband circuit appears attractive because of the reduced cost realized by area reduction due to replacing of resistor with switch capacitor. The demand for a low-cost but high performance wireless front-end, many intensive researches on CMOS radio-frequency (RF) front-end circuit has been carried out. The goal is to minimize the cost and enhance the performance, low power consumption design. To design a Low Noise Amplifier one of the method which we have used is an inductor-less noise cancelling broadband using switch capacitor with composite transistor pair. The composite pair of NMOS/PMOS cross coupled transistor is used to amplify the input signal while reducing noise figure. It reduces the noise figure by partially cancelling noise which is generated by the input transistor pair.

[1] M. Zargari,M. Terrovitis, S. H.-M. Jen, B. J. Kaczynski,M. P.MeeLan Lee Mack, et.al. "A single-chip dual-band tri-mode CMOS transceiver for IEEE 802. 11a/b/g wireless LAN," IEEE J. Solid-State Circuits, vol. 39, no. 12, pp. 2239–2248, Dec. 2004.

[2] J. Ko, J. Kim, S. Cho, and K. Lee, "A 19-mW 2.6-mm L1/L2 dualband CMOS GPS receiver," IEEE J. Solid-State Circuits, vol. 40, no. 7, pp. 1414–1425, Jul. 2005.

[3] K. Muhammad, H. Yo-Chuol, T. L. Mayhugh, H. Chih-Ming, T. Jung, I. Elahi, C. Lin, I. Deng, C. Fernando, J. L. Wallberg, S. K. Vemulapalli. Larson, T. Murphy, D. Leipold, P. Cruise, J. Jaehnig, M.-C. Lee, R. Staszewski, R. Staszewski, and K. Maggio, "The first fully integrated quad-band GSM/GPRS receiver in a 90-nm digital CMOS process," IEEE J. Solid-State Circuits, vol. 41, no. 8, pp. 1772–1783, Aug. 2006.

[4] F. Bruccoleri,E. A. M. Klumperink, and B. Nauta, "Wide-band CMOS low-noise amplifier exploiting thermal noise cancellation," IEEE J. Solid-State Circuits, vol. 39, no. 2, pp. 275–282, Feb. 2004.

[5] J.-H. C. Zhan and S. S. Taylor, "An inductor-less broadband LNA with gain step," in Proc. Eur. Solid-State Circuits Conf. (ESSCIRC), 2006, pp. 344–347.

ABSTRACT: Color vision deficiency is pretty common, in US about 8% of the males and 1% of females have color vision deficiency from birth [6]. People with color vision problem often have trouble in differentiating certain colors. Color vision deficient people are liable to missing some information that is taken by color. People with complete color blindness can only view things in white, gray and black. Insufficiency of color acuity creates many problems for the color blind people, from daily actions to education. The color blindness can be categorized into two different levels: green color deficiency and red color deficiency. The people with the blue color deficiency is less than 1%. Therefore the main focus of this paper is to develop a system that enables color deficient people to identify the green and red colors separately.
Keywords:Color blindness, dichromacy, daltonization, enhancement, RGB, LMS, color space, wavelength, hue, delta E.

[1]. RuchiKulshrestha, R. K. Bairwa: "Review of Color Blindness Removal Methods using Image processing". International Journal of Recent Research and Review, vol VI, June 2013
[2]. RuchiKulshrestha, R. K. Bairwa: "Removal of Color Blindness using Threshold and masking". International Journal of Advanced Research in Computer Science and Software Engineering.
[3]. William Woods: "Modifying Images for Color Blind Viewers". Department of Electrical Engineering, Standford University.
[4]. Prof. D.S. Khurge, BhagyashreePeswani: "Modifying Image Appearance for Improvement in Information Gaining For Color Blinds". International Journal for Scientific Research and Development. Vol. 1, Issue 12, 2012.
[5]. Deeksha Garg, Richa Sharma: "Transformation of Images for the Color Blind Viewers using Bacteria Foraging Optimization Technique". International Journal of Recent Technology and Engineering (IJRTE). ISSN: 2277-3878, volume-1, Issue-66, January 2013
[6] Tomoyuki Ohkuboand Kazuyuki Kobayashi, "A Color Compensation Vision System for Color-blind People‟, SICE Annual Conference, The University Electro-Communications, Japan, August 20-22, 2008.
[7] Christos-Nikolaos Anagnostopoulos, George Tsekouras, IoannisAnagnostopoulos Christos Kalloniatis, "Intelligent modification for the daltonization process of digitized paintings‟, Cultural Technology & Communication Dpt., University of the Aegean, Mytilene, Lesvos, Greece, 81 100.

ABSTRACT: In many Digital Signal Processing (DSP) applications arithmetic operations are widely used and the speed of the applications mainly depends on these operations.Multiply-Accumulate unit(MAC) and Add-Multiply (AM) operator are the widely used operators for this purpose.In this paper, a new design of Fused Add-Multiply (FAM) operator is proposed which uses a newly designed recoding technique for Modified Booth Recodingandimplements the direct recoding of the multiplier in its Sum to Modified Booth (S-MB) form. It is simple, structured, and can be easily modified in order to apply either in signed or unsigned numbers and uses Dadda Carry Save Adder (CSA) for the reduction of partial products. Comparing with the existing recoding FAM designs, the proposed technique yields considerable reductions in terms of critical delay and hardware complexity of the newly designed FAM unit.

Index Terms: Add-Multiply operation, Arithmetic Circuits, Dadda tree,Look-up Tables (LUTs), Modified Booth Recoding, VLSI Design.

[1]. Kostas Tsoumanis, Sotiris Xydis, Nikos Moschopoulos, and KiamalPekmestzi, ―An Optimized Modified Booth Recoder for Efficient Design of the Add-Multiply Operator‖, IEEE Transactions On Circuits And Systems—I: Regular Papers, Vol. 61, No. 4, pp. 1133-1143, April 2014.
[2]. SukhmeetKaur, Suman and ManpreetSignh Manna, ―Implementation of Modified Booth Algorithm (Radix 4) and its Comparison with Booth Algorithm (Radix-2),‖ Advance in Electronic and Electric Engineering., Volume 3, Number 6 (2013), pp. 683-690.
[3]. Young-HoSeo and Dong-Wook Kim, ―A New VLSI Architecture of Parallel Multiplier–Accumulator Based on Radix-2 Modified Booth Algorithm‖, IEEE Transactions On Very Large Scale Integration (Vlsi) Systems, Vol. 18, No. 2, pp. 201-208, February 2010.
[4]. C. N. Lyu and D. W. Matula, ―Redundant binary Booth recoding,‖ in Proc. 12th Symp. Comput. Arithmetic, 1995, pp. 50–57.
[5]. J. D. Bruguera and T. Lang, ―Implementation of the FFT butterfly with redundant arithmetic,‖ IEEE Trans. Circuits Syst. Il, Analog Digit. Signal Process., vol. 43, no. 10, pp. 717–723, Oct. 1996.

ABSTRACT: Advanced electronic device technologies require faster operation and less average power which are the most important parameters in VLSI design. Conventional CMOS technology is found to have threshold voltage and sub threshold leakage problems in scaling of device which fail to adapt in sub-micron and nano technologies. The carbon nanotube field effect transistor (CNTFET) technology overcomes the threshold voltage and sub threshold leakage problems even though the size is reduced. Most of the fast adders are based on being able to calculate the carry propagation much faster without having to wait for it to ripple through each bit of the adders. The carry look ahead (CLA) technique is the most commonly used scheme for accelerating carry propagation. In this paper, a CNTFET based carry look ahead adder is evaluated with HSPICE simulation in 32 nm technology, using Domino and NP dynamic CMOS techniques which effectively suppress both dynamic switching and leakage power consumption without increase in propagation delay.

Keywords: Carry look ahead adder, CNTFET, Domino logic, NP Dynamic logic

[1]. Y. Sun and V. Kursun, ―N-type carbon-nanotube MOSFET device profile optimization for very large scale integration,‖ Trans. Electri. Electron. Mater., vol. 12, no. 2, pp. 43–50, Apr. 2011.
[2]. P. Avouris, Z. Chen, and V. Perebeinos, ―Carbon-based electronics,‖ Nature Nanotechnol., vol. 2, pp. 605–615, Oct. 2007.
[3]. S. Lin, Y. Kim, and F. Lombardi, ―CNTFET-based design of ternary logic gates and arithmetic circuits,‖ IEEE Trans. Nanotechnol., vol. 10, no. 2, pp. 217–225, Mar. 2011.
[4]. [Online]. Available: http://ptm.asu.edu/
[5]. [Online]. Available: https://nano.stanford.edu/stanford-cnfet-model-hspice
[6]. [Online]. Available: http://www.mosis.com/files/scmos/scmos.pdf
[7]. J. Deng and H.-S. P.Wong, ―A compact SPICE model for carbon-nanotube field-effect transistors including nonidealities and its application— Part I: Model of the intrinsic channel region,‖ IEEE Trans. Electron Devices, vol. 54, no. 12, pp. 3186–3194, Dec. 2007.

ABSTRACT: Image enhancement is used to reduce the noise and improve resolution contrast of the image. The images can be improved by improving the quality regarding the pixel values. The pixel values are manipulated with the number of inputs and the gray level values. On the other hand Fuzzy image enhancement is based on gray level mapping into a fuzzy plane, using a membership function. This paper compares the enhancement performance of commonly used Median Filter and Fuzzy Inference System. Both the methods are tested on 15 MRI brain images. The comparison is based on the parameter Peak Signal to Noise Ration. Fuzzy Inference System shows 17.74 percent improvement in PSNR than Median Filter with improvement in image appearance.

[1] T. S. Huang, W. F. "Image Enhancement: A Review" vol. 1, pp. 49 – 59, Opto-Electronics, 1969.
[2] J.S. Lim: "Image Enhancement in Digital Image Processing Techniques", Chapter 1, pp. 1-51, M. P. Ekstrom, edition.
[3] Jaya , K.Thanushkodi , M.Karnan, Tracking Algorithm for De-Noising of MR Brain Images, International Journal of Computer Science and Network Security, 9(11), November 2009, 262-267
[4] G.L. Turin: "An Introduction to Matched Filtering", pp. 311 – 329, IRE Trans. Inform. Theory, June 1960.
[5] Chen B.-T, Chen Y.-S, Hsu W.-H. Image Processing and understanding based on fuzzy inference approach. In Proc. FUZZ-IEEE '94,Vol I: 254-259, Orlando, FL, USA, June, 1994.
[6] Choi Y.S., Krishnapuram R. A robust approach to image enhancement based on fuzzy logic. IEEE Trans. on Image Processing, 6(6): 808–825, 1997.
[7] De T.K., Chatterji B.N. An approach to a generalised technique for image contrast enhancement using the concept of fuzzy set. Fuzzy Sets and Systems 25(2):145–158, 1988..

ABSTRACT: The basic purposes of an Amplifier are to do just that, to amplify (a signal). However, the way different types of amplifiers do this can vary greatly, and an amplifier can do other tasks besides amplifying. Generally when we speak of amplifiers we mean increase the power of a signal. We are starting to get into the building blocks that make up part of a radio system. Signals that we actually amplify in radio and communications are very often not sine waves, though many times they are. For our discussion we will consider that we are amplifying a sine wave(s) of alternating voltage or current.

[1]. Chaitanya K. Chava, and José Silva-Martínez, ―A Frequency Compensation Scheme for LDO Voltage Regulators,‖ IEEE Transactions on Circuits and Systems—I: Regular Papers, Vol. 51, and no. 6, JUNE 2004.
[2]. Michael Day, ―Understanding Low Drop out (LDO) Regulators,‖ Texas Instruments.
[3]. Liake Wang, Jinguang Jiang, Shanshan Li, Xu Gong and Qingyunli, ―A High Stability Low Drop-out Regulator with Fast Transient Response,‖ IEEE 978-1-4244-5849-3/10/$26.00 ©2010.
[4]. Yali Shao, Yi Wang, ZhihuaNing, Lenian He, ―Analysis and Design of High Power Supply Rejection LDO,‖ IEEE 978-1-4244-3870-9/09/$25.00 ©2009.
[5]. Chaitanya K. Chava and Jose Silva-Martinez, ―A Robust Frequency Compensation Scheme for Ldo Regulators,‖ IEEE 0-7803-7448-7/02/$17.00 02002.
[6]. Zhou Qianneng, Li Hongjuan, Min Tan, ―LDO Regulator with Slew-Rate Enhancement Circuit for Low-Power SoC,‖ 978-1-4244-8039-5/11/$26.00 ©2011 IEEE.
[7]. Liang-GuoShen, Zu-Shu Yan, Xing Zhang, ―High-Accuracy Low-Dropout Voltage Regulator Based on Slow-Roll off Frequency Compensation,‖ IEEE 1-4244-1378-8/07/$25.00 ©2007.

ABSTRACT: In most of the restaurant meal ordering is relying on the interaction with waiters to place order into the kitchen. In busy hours of restaurant this coordination is a challenge result in un-satisfaction to the customer. To realize this, Intelligent Restaurant is designed. This Restaurant uses modern innovation such as multi-touch module, RF module, Meal Serving Robot and database to improve quality of services of Restaurant and to enhance customers' dining experience. A meal serving robot is a line following robot which is designed using sensor to track the black line path predetermined for serving. Android Application - PayPal is used for online payment.

Keywords: Line following meal-serving robot, Multi-touchable Arduino Mega, RF module, Android App-PayPal, Database.

[1]. Juhana Jauhiainen ,Sakari Pieska, , Antti Auno , Markus Liuska , Antti Auno Intelligent Restaurant System Smart- menu CogInfoCom 2013, 4th IEEE Conference on Cognitive Info communications, December , 2013 , Budapest, Hungary
[2]. Ching-Su Chang,Tan-Hsu Tan and Yung-Fu Chen Developing an Intelligent e-Restaurant With a Menu Recommender for Customer-Centric Service vol.42,no-5, IEEE Transactions on systems, man, and cybernetics September 2012.
[3]. SongQingqing and Sun Guiling Design of the Restaurant Self-service Ordering System Based on ZigBee Technology Communications and embedded system lab ,Nankai University Tianjin, China 2010 IEEE.
[4]. Dr. Vinayak Ashok Bharadi, Vivek Ranjan, Nikesh Masiwal, Nikita Verma e-Restaurant: Online Restaurant Management System for Android International Conference & Workshop On Advance Computing 2013.
[5]. A. A. A. Rahman,M. Z. H. Noor, , M. S. A. M. Ali, M. F. Saaid,M. Zolkapli The Development of Self-service Restaurant Ordering System (SROS) Control and System Graduate Research Colloquium (ICSGRC 2012) IEEE 2012 .

ABSTRACT: A floating-point unit (FPU) colloquially is a math coprocessor, which is a part of a computer system specially designed to carry out operations on floating point numbers. Typical operations that are handled by FPU are addition, subtraction, multiplication and division. The functions performed are handling of Floating Point data, converting data to IEEE754 format, perform any one of the following arithmetic operations like addition, subtraction, multiplication, division . All the above algorithms have been evaluated under Modelsim environment. All the functions are built by possible efficient algorithms with several changes incorporated at our end as far as the scope permitted. Consequently all of the unit functions are unique in certain aspects and given the right environment these functions will tend to show comparable efficiency and speed ,and if pipelined then higher throughput.

Keywords: Floating, Algorithm, coprocessor, pipelined, throughput.

[1] IEEE 754-2008, IEEE Standard for Floating-Point Arithmetic, 2008.
[2] L. Louca, T. A. Cook, and W. H. Johnson, "Implementation of IEEE Single Precision Floating Point Addition and Multiplication on FPGAs," Proceedings of 83 the IEEE Symposium on FPGAs for Custom Computing Machines (FCCM‟96), pp. 107–116, 1996.
[3] A. Jaenicke and W. Luk, "Parameterized Floating-Point Arithmetic on FPGAs", Proc. of IEEE ICASSP, 2001, vol. 2, pp. 897-900.
[4] "DesignChecker User Guide", HDL Designer Series 2010.2a, Mentor Graphics, 2010
[5] "Precision® Synthesis User‟s Manual", Precision RTL plus 2010a update 2, Mentor Graphics, 2010.

ABSTRACT: Arithmetic operations of high complexity are widely used in Digital Signal Processing (DSP) applications. The FFT algorithms use butterfly method in order to find the output. The Butterfly method includes an addition followed by a multiplication. In this work, we focus on optimizing the design of the fused Add-Multiply (FAM) operator for increasing performance and hence the FFT. Optimization of fused add multiply operation is done using three techniques. A direct recoding of the sum of two numbers in its Modified booth form is utilized. The delay and area comparison of the three techniques is done and best algorithm will be used in the Butterfly algorithm of FFT to obtain higher efficiency and Lower Delay. Here SMB2 was found to be lowest in terms of area and delay and it was used in the implementation of butterfly algorithm

Keywords: Booth Recoding; Fused Add Multiply; FPGA; VLSI Design ; Butterfly Algorithm ;FFT

[1] Kostas Tsoumanis, Constantinos Efstathiou, Nikos Moschopoulos, and Kiamal Pekmestzi ―An Optimized Modified Booth Recoder for Efficient Design of the Add-Multiply Operator.‖ ieee transactions on circuits and systems—I: regular papers, vol. 61, no. 4, april 2014
[2] A. Amaricai, M. Vladutiu, and O. Boncalo, ―Design issues and implementations for floating-point divide-add fused,‖ IEEE Trans. Circuits Syst. II–Exp. Briefs, vol. 57, no. 4, pp. 295–299, Apr. 2010.
[3] E. E. Swartzlander and H. H. M. Saleh, ―FFT implementation with fused floating-point operations,‖ IEEE Trans. Comput., vol. 61, no. 2, pp. 284–288, Feb. 2012.
[4] S. Nikolaidis, E. Karaolis, and E. D. Kyriakis-Bitzaros, ―Estimation of signal transition activity in FIR filters implemented by a MAC architecture,‖ IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 19, no. 1, pp. 164–169, Jan. 2000.
[5] O. Kwon, K. Nowka, and E. E. Swartzlander, ―A 16-bit by 16-bitMAC design using fast 5: 3 compressor cells,‖ J. VLSI Signal Process. Syst., vol. 31, no. 2, pp. 77–89, Jun. 2002.

ABSTRACT: The quality of the image can be determined in two ways, subjective and objective. Here the objective evaluation of the multicamera image has been implemented. This paper details the techniques for implementing the quality measure of multicamera imagse. Here the quality of the image can determine by using PSNR, MSSIM, VIF and MIQM techniques. The PSNR, MSSIM and VIF are the commonly used image quality measurement techniques for single camera image but MIQM techniques is an alternative to the above mentioned techniques which do-not deal with the many issues found with multicamera image. Here while implementing these techniques, the multicamera images are simulated. Here the two distortions mainly considered called as photometric distortion and geometric distortion.

[1] Mashhour Solh, Ghassan Alregib, "MIQM: A Multicamera Image Quality Measure" IEEE Transaction on Image Processing, Voiume. 21, No. 9, pp.3902-3914, September 2012.

[2] Mahesh G. Chinchole, Sanjeev N. Jain,"A Review On Multicamera Image Quality Analysis" International Journal of Engineering Research and General Science Volume 3, Issue 3, May-June, 2015.

[3] C. Tang, C. C. Y. Yu, and C. Tsai, "Visual sensitivity guided bit allocation for video coding," IEEE Trans. Multimedia, vol. 8, no. 1, pp. 11–18, Feb. 2006.

[4] Z. Wang, A. Bovik, H. Sheikh, and E. Simoncelli, "Image quality assessment: From error visibility to structural similarity," IEEE Trans. Image Process., vol. 13, no. 4, pp. 600–612, Apr. 2004.

[5] S.S. Bedi, R. Khandelwal " Various Image Enhancement Techniques- A Critical Review" International Journal of Advanced Research in Computer and Communication Engineering Vol.2, Issue 3, March 2013.

[6] Haichao Zhang, Lawrence Carin " Multi-Shot Imaging: Joint Alignment, Deblurring and Resolution-Enhancement" Duke University.

ABSTRACT: The main objective of this paper is to provide a comparison between two di-phone-based concatenative speech synthesis systems for Marathi language. In concatenative speech synthesis systems, speech is generated by joining small prerecorded speech units which are stored in the speech unit register. A di-phone is a speech unit that begins at the middle of one phoneme and extends to the middle of the following one. Di-phones are commonly used in concatenative text to speech (TTS) systems as they have the advantage of modeling co-articulation by including the transition to the next phone inside the unit itself. The first synthesizer in this comparison was implemented using the Festival TTS system and the other synthesizer uses the MARY TTS system. In this comparison, the differences between the two systems in handling some of the challenges of the Marathi language and the differences between the Festival TTS system and the MARY TTS system in the DSP modules are highlighted. Also, the results of applying the diagnostic rhyme test (DRT) on both of the synthesizers are illustrated.

Keywords:- Text-to-Speech Di-phone-based Concatenation, Festival TTS, MARY TTS, Digital Signal Processing Diagnostic Rhyme Test.

[1]. Sangramsing Kayte, Dr. Bharti Gawali "Marathi Speech Synthesis: A review" International Journal on Recent and Innovation Trends in Computing and Communication ISSN: 2321-8169 Volume: 3 Issue: 6 3708 – 3711
[2]. Sangramsing Kayte, Monica Mundada "Study of Marathi Phones for Synthesis of Marathi Speech from Text" International Journal of Emerging Research in Management &Technology ISSN: 2278-9359 (Volume-4, Issue-10) October 2015
[3]. Richard Sproat and Steven Bedrick (September 2011). "CS506/606: Txt Nrmlztn". Retrieved October 2, 2012.
[4]. John Holmes and Wendy Holmes, "Speech Synthesis and Recognition", Second edition published by Taylor & Francis, 2001.
[5]. Sangramsing N.kayte "Marathi Isolated-Word Automatic Speech Recognition System based on Vector Quantization (VQ) approach" 101th Indian Science Congress Jammu University 03th Feb to 07 Feb 2014.
[6]. Sangramsing Kayte, Monica Mundada, Santosh Gaikwad, Bharti Gawali "PERFORMANCE EVALUATION OF SPEECH SYNTHESIS TECHNIQUES FOR ENGLISH LANGUAGE " International Congress on Information and Communication Technology 9-10 October, 2015

ABSTRACT: The biometrics refers to technologies that measure and analyze human body characteristics, such as DNA, fingerprints, eye retinas and irises, voice patterns, facial patterns and hand measurements, for authentication purposes. Biometrics has been in the development for many years and with the recent advancements in technology has made some biometrics affordable and more reliable. Our goal is to show how DNA biometrics can improve the network security scheme of an organization. The process of biometrics will be broken down by its process and limitations, accessibility, accuracy, and use with applications. That's why DNA Biometric is essential to make for best recognition.

Keywords - Biometric, DNA,

[1]. United States. National Science and Technology Council (NSTC). Biometrics Frequently Asked Questions September 7, 2006.http://www.biometrics.gov/docs/faq.pdf.
[2]. Biometrics. Jain, A. K. April 28-30, 2004. http://en.wikipedia.org/wiki/Biometrics.
[3]. Development of Biometric DNA Ink for Authentication Security. Hashiyada, Masaki, July, 2004. http://www.sasappa.co.jp/online/abstract/tmp/1/204/html/0112040202.html
[4]. Portable DNA Analyzer. Tech News. October 16, 2007. Portable DNA Analyzer
[5]. Sangramsing Kayte, Suvarnsing G.Bhable and Jaypalsing Kayte, ―A Review Paper on Multimodal Biometrics System using Fingerprint and Signature‖. IJCA Volume 128 – No.15, October 2015.
[6]. United States. National Institute of Standard and Technology. Privacy & Biometrics, Building a Conceptual Foundation Pg. 4-52. September 15, 2006. http://www.biometrics.gov/docs/privacy.pdf.