iosr-JEEE   Volume-9 ~ Issue-2 ~ March-April 2014

Abstract: As the power generation paradigm is going green by involvement of renewable energy sources, the energy management process also has to evolve towards new more powerful, intelligent control methods. The inter-connection of a large number of renewable energy sources to the grid, along with their obvious advantages, makes the grid highly distributed. This may cause problems of efficient control, stability, reliability, power quality and security, thus represent one of the greatest engineering challenges.

[1] H. Farhangi, The path to smart grid, IEEE Power and Energy Magazine, Jan/Feb 2010.
[2] SmartGridNews.com,The National Science Foundation (NSF) Official department of U.S website.
[3] S. McArthur, E. Davidson, V. Catterson, A. Dimeas, N. Hatziargyriou, F. Ponci, and T. Funabashi, Multi-Agent Systems for Power Engineering Applications - Part I, Power Systems, IEEE Transactions, vol. 22, no. 4 2007
[4] Adhau, S., et al., A Multi-Agent system for distributed multi-project scheduling: An auction-based negotiation approach. Engineering Applications AI 2012:
[5] S. D. J. McArthur, E. M. Davidson, G. J. W. Dudgeon, and J. R. Mc- Donald, "Toward a model integration methodology for advanced applications in power engineering," IEEE Trans. Power Syst., vol. 18, no. 3, 2003
[6] T. Funabashi, T. Tanabe, T. Nagata, and R. Yokoyama, "An Autonomous Agent for Reliable Operation of Power Market and Systems Including Micro-Grids" IEEE 2008 Nanjing China

Abstract: This paper presents a single phase 7-level half bridge cascade dual buck multilevel grid-tied inverter with both active and reactive power flow control in a wide range under two types of renewable energy. The power flow is controlled by varying the switching pulse of the power semiconductor device used in the half bridge cascade dual buck multilevel grid-tie inverter. The multicarrier sinusoidal pulse width modulation (SPWM) is used by which the power angle can be varied, by changing the switching pulse. By varying the power angle, the voltage and current at the grid side is changed. Active and Reactive power consumed or injected by each unit is depending on the shift angle between the current and modulated voltage in the each single unit of cascade dual buck inverter. Thus by varying the power angle, the power flow can be controlled effectively. The Total Harmonic Distortion (THD) is reduced, when compared with the 11-level cascade H-bridge grid-tie inverter. This is proved by using FFT analysis in MATLAB SIMULINK. The simulation is carried out for both type I and type II system in MATLAB SIMULINK. The experimental results have proved the effectiveness of the designed grid-tie control for both type I and type II system.

[1] Chen C.L., Liu C., Lai J.-S., Sun P. W., Cascade Dual Buck Inverter With Phase-Shift Control, IEEE Transactions on Power Electronics, vol. 27, no. 4. 2012.
[2] Gopakumar K., Malinowski M., Rodriguez J., P´erez M.A., A Survey On Cascaded Multilevel Inverters, IEEE Transactions on Industrial Electronics, vol. 57, no. 7, pp. 2196–2206. 2010.
[3] Filho F., Tolbert L.M., Yue C. , 11-Level Cascaded H-Bridge Grid-Tied Inverter Interface with Solar Panels, in Proceedings of IEEE, pp. 968–972. 2010.
[4] Chen C.-L., Lai J.-S., Lee Y.-S., Martin D., Wang Y. , Design Of Parallel Inverters For Smooth Mode Transfer Microgrid Applications, IEEE Transactions on Power Electronics, vol. 25, no. 1, pp. 6–15. 2010.
[5] Caluisi C., Cecati C., Piccolo A., Siano P., Sindona A., Multilevel Inverters And Fuzzy Logic For Fuel Cells Power Conditioning And Control, in Proceedings of IEEE, pp. 2739–2744. 2010.

Abstract: There is a network of many layers of waves, made of electric current, in our brain. That is called mind. Our mind circulates electric current to our each and every cell. There is a bone of the shape of our full body image, from head to toe, nearby our heart. This bone is surrounded by electric current, circulated by our mind. Laymen call this bone as Soul bone. We can contact Aliens through this process.

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Abstract: This work presents the implementation of a high efficiency adapter using voltage regulators along with the converters. A new structure of the slim-type processor is proposed, which is composed of copper wire as the primary winding and printed circuit- board winding on the outer layer as the secondary winding be layout drawn using a Cadence virtuoso tool and by the simulation process it is tested in a 180nm CMOS technology. The proposed structure is suitable for a slim and high-efficiency regulator as well as converter because it has advantages of easy utilization and wide conductive cross sectional area compared to the other works. In addition the voltage doublers rectifier is applied to the secondary side due to its simple structure of secondary winding, and a CLC filter is adopted to reduce the output filters size. The validity of this study is confirmed by the experimental results.

Index Terms: CLC output filter, slim-type transformer, and voltage-doubler rectifier.

[1] Byoung-Hee Lee and Gun-Woo Moon," Zero No-Load Power AC/DC Adapter for Electronic Equipment WithEmbedded Battery", IEEE transactions on power electronics, vol. 28, no. 7, July 2013.
[2] Research and Markets, External ac-dc power supplies: Worldwide forecasts, 10th ed.," Apr. 2011.
[3] Joint Staff, An Evolving Joint Perspective: U.S. Joint Warfare and Crisis Resolution in the 21st Century Jan. 28, 2003.
[4] The White House, National Security Strategy of the United States of America Mar. 2006.
[5] OSD, Quadrennial Defense Review (QDR) Rep. Feb. 6, 2006.
[6] Chairman of the Joint Chiefs of Staff, National Military Strategy of the United States of America: A Strategy for Today; A Vision for Tomorrow 2004.

Abstract: near field communication is young radio technology which operates within 10 cm and data rates available are 106, 212, 424 kbps and mobile ticketing is considered as one of the most promising application of nfc. customer could use their mobile phone which is configured with rfid tag. furthermore nfc enabled unit have been placed at station in the area containing station specific information. by placing the mobile phone in front of rfid reader one can get the ticket on mobile phone. nfc ticketing has many advantages over smart card application such as it is faster in speed.

Keywords: communication mode mobile, nfc, system structure, ticketing

[1] E. Rukzio, G. Broll, K. Leichtenstern, A. Schmidt, "Mobile Interaction with the Real World: An Evaluation and Comparison of Physical Mobile Interaction Techniques," in Proc. AmI-07 European Conference on Ambient Intelligence, 2007, Darmstadt, B. Schiele et al. (Eds.), Springer, pp. 1-18, Lecture Notes in Computer Science 4794.
[2] J. Langer and M. Roland, Anwendungen und Technik von Near Field Communication (NFC), 1st ed. Springer, 2010.
[3] "RMV," Rhein-Main-Verkehrsverbund, retrieved on Oct. 20th, 2011. [Online]. Available: http://www.rmv.de/en/Fahrplanauskunft/Fahrplaene/Fahrplaene fuer Handy und Co/39706/HandyPortal.html
[4] Moroni A., M-PAyments: La Pubblica Amministrazione passa per il telefonino (Trad. En. M-Payments: Italian Public Aministration goes through mobile phone). Degree Thesis in Human Computer Interaction, 2007, University of Rome "Sapienza", Faculty of Communication Science.

Abstract: This paper deals with the Optimal location and control of a unified power flow controller (UPFC) along with transformer taps are tuned to simultaneously optimize the voltage stability limit (VSL) and real power losses of a mesh power system network. This problem is dealt as a nonlinear equality and inequality constrained optimization problem with an objective function incorporating both the real power loss and VSL. An evolutionary algorithm known as shuffled frog leap is applied for solving the UPFC location, its injected series voltage, and also the tap positions of transformers as the variables. The then obtained results of SFC algorithm are compared with the results of Bacteria Foraging-Based Algorithm using IEEE 14 bus.

Index Terms: Shuffled frog leap, continuation power flow, linearprogramming, optimal power flow (OPF).

[1] P. Ristanovic, "Successive linear programming based OPF solution," Optimal Power Flow: Solution Techniques, Requirements and Challenges,IEEE Power Eng. Soc., pp. 1–9, 1996.
[2] D. Sun et al., "Optimal power flow by newton approach," IEEE Trans. Power App. Syst., vol. PAS-103, no. 10, pp. 2864–2875, Oct. 1984.
[3] S. Granville, "Optimal power dispatch through interior pont methods," IEEE Trans. Power Syst., vol. 9, no. 4, pp. 1780–1787, Nov. 1994.
[4] G. Torres and V. Quintana, "An interior point method for non-linear optimal power flow using voltage rectangular coordinates," IEEE Trans.Power Syst., vol. 13, no. 4, pp. 1211–1218, Nov. 1998.
[5] J. L. Martinez Ramos, A. G. Exposito, and V. Quintana, "Transmission loss reduction by interior point methods: implementation issues and practical experience," Proc. Inst. Elect. Eng., Gen., Transm., Distrib., vol. 152, no. 1, pp. 90–98, Jan. 2005.
[6] M. Noroozian, L. Angquist, M. Ghandhari, and G. Anderson, "Use of UPFC for optimal power flow control," IEEE Trans. Power Del., vol. 12, no. 4, pp. 1629–1634, Oct. 1997.

Abstract: In India rail transport occupies a prominent position in providing the necessary transport infrastructure to sustain needs of a rapidly growing economy. Today, India possesses the fourth largest railway network in the world. However, in terms of the reliability and safety parameters, we have not yet reached truly global standards. The main problem about a railway analysis is detection of cracks in the structure. If these deficiencies are not controlled at early stages they might lead to a number of derailments resulting in a heavy loss of life and property. This project proposes a cost effective solution to the problem of railway track crack detection utilizing RF control assembly which tracks the exact location of faulty track which then mended immediately so that many lives will be saved. Keywords: Automation, CAN Controller, Cracks, Detection, GSM, GPS

[1] Avinash Vanimireddy, D.Aruna Kumari, Automatic Broken Track Detection Using LED-LDR Assembly, International Journal of Engineering Trends and Technology (IJETT) – Vol. 4, Issue 7- July 2013

[2] M. Kalaimathi, P. Ilakya & E. Sathiavathy, Innovative Railway Track Surveying with Sensors and Controlled by Wireless Communication, ISSN (Print) : 2278-8948, Vol. 2, Issue 3, 2013 [3] S. Ramesh, S. Gobinathan, Railway Faults Tolerance Techniques using Wireless Sensor Networks, International Journal of electronics & communication technology - Vol. 3, Issue 1, Jan.- March 2012

[4] Shaik Sulthan Basha, K Balakrishna, Robust railway crack detection theme (RRCDS) using LED-LDR assembly, International Journal of Reviews on Recent Electronics and Computer Science, August 2013/Vol. 1/Issue 4/425-429, ISSN 2321-5461

[5] Ramesh Shunmugam, Ramesh.K, Modeling and Detecting Damage in Rails & Avoidance of Collision in the Tracks, International Journal of Scientific & Engineering Research, Vol. 2, Issue 2, February-2011, ISSN : 2229-5518

Abstract: In this paper we propose the design and development of digital filters for audio application using Xilinx System Generator. Digital Filters are important elements in Digital Signal Processing (DSP). In this case, we can decimate the high frequency signal (128 KHz) upto respective low frequency signal (3.4 KHz). Also we introduced some designs of digital filters using MATLAB Simulink model and Xilinx System Generator and compare their respective results in case of computation and storage requirement. The proposed technique is centered on the FIR filtering technique for decimation of audio signal.

Keywords: Digital Signal Processing, Digital filters, FIR filter, Matlab Simulink and Xilinx System Generator.

1] L.C Loong and N.C Kyun, "Design and Development of a Multirate Filters in Software Defined Radio Environment", International Journal of Engineering and Technology, Vol. 5, No. 2, 2008.
[2] Prasit Kumar Bandyopadhyay and Arindam Biswas, "FPGA Based High Frequency Noise Elimination System From Speech Signal Using XILINX System Generator", Journal of Electron Devices, Vol. 17, 2013.
[3] Fredric J. Harris and Michael Rice, "Multirate Digital Filters for Symbol Timing Synchronization in Software Defined Radios", IEEE Journal vol. 19, no. 12, December 2001.
[4] Rajesh Mehra and Rashmi Arora, "FPGA-Based Design of High-Speed CIC Decimator for Wireless Applications", International Journal of Advanced Computer Science and Applications, Vol. 2, No. 5, 2011.
[5] Ljiljana Milic, Tapio Saramaki and Robert Bregovic, "Multirate Filters: An Overview", IEEE Journal, 1-4244-0387, 2006.

Abstract: High speed devices such as ADC, operational amplifier are of great importance and for this high speed application, a major thrust is given towards low power methodologies. Minimization in power consumption in these device can be achieved by smaller feature size processes. Dynamic comparator are being used in today's A/D converters extensively because of their speed , lesser power dissipation , zero static power consumption and full-swing digital level output voltage in shorter time duration. Back to back inverter in these dynamic comparator provides positive feedback mechanism which convert a smaller voltage difference in full scale digital level output. A pre-amplifier based comparator can amplify a small input voltage difference to a large enough voltage to overcome the latch offset voltage and reduce the kickback noise. However the pre-amplifier based comparator suffer large static power consumption as well as reduced intrinsic gain with the reduction of the drain to source resistance due to continuous technology scaling.

Keyword: Comparators ,High speed Analog-to-digital converter ,Regenerative comparator.

[1] T. Kobayashi, K. Nogami, T. Shirotori and Y. Fujimoto, "A current-controlledlatch sense amplifier and a static power-saving input
buffer for low-powerarchitecture," IEEE J. Solid-State Circuits, vol. 28, pp. 523-52, April 1993.
[2] B. Wicht, T. Nirschl, and D. Schmitt-Landsiedel, "Yield and speed optimization ofa latch-type voltage sense amplifier", IEEE J.
Solid-State Circuits, vol. 39, pp.1148-1158, July 2004.
[3] D. Schinkel, E. Mensink, E. Kiumperink, E. van Tuijl and B. Nauta, "A Double-Tail Latch-Type Voltage Sense Amplifier with
18ps Setup+Hold Time," ISSCCDig. Tech. Papers, pp. 314-315 and 605, Feb. 2007.
[4] M. Miyahara, Y. Asada, P. Daehwa and A. Matsuzawa, "A Low-Noise Self-Calibrating Dynamic Comparator for High-Speed
ADCs," in Proc. A-SSCC, pp.269-272, Nov. 2008.
[5] H.J. Jeon, Y.B. Kim, "A Low-offset High-speed Double-tail Dual-rail DynamicLatched Comparator," ACM GLSVLSI'10(Great
Lakes Symposium on VLSI),May 16-18, 2010

Abstract: Increasing speed and complexity of design gives a significant increase in power consumption in VLSI chips. Speed, power consumption and space are major issues in VLSI circuit. To meet these challenges there are certain design techniques which are used to reduce power. Optimization of power can be done by considering various components such as transistor sizing, voltage scaling, variable VDD, multiple threshold voltages, voltage islands, power gating, long channel transistor, stacking & parking states and logic styles etc. Power consumption in VLSI circuit is data dependent. In this paper different design methods are tested to optimize the power. It is found that algorithm based design reduces gate switching activity that results reduction of power in multiplier circuit.
Keyword: Transistor sizing, voltage scaling, variable VDD, multiple threshold voltages, voltage islands, long channel transistor, stacking & parking states, logic styles, Genetic algorithm, Booth multiplication.

[1] S. C. Prasad and K. Roy, "Circuit Optimization for Minimization of Power Consumption Under Delay Constraint". In Proceedings of the Int‟l Workshop on Low Power Design, pages 15–20, April 1994.
[2] Coello, Carlos A., Christiansen, Alan D. & Hernández Aguirre, "Using Genetic Algorithms to Design Combinational Logic Circuits." ANNIE'96. Intelligent Engineering through Artificial Neural Networks, Volume 6. Smart Engineering Systems: Neural Networks, Fuzzy Logic and Evolutionary Programming. Edited by Cihan H. Dagli, Metin Akay, C. L. Philip Chen, Benito R. Fernandez and Joydeep Ghosh. pp 391-396. November, 1996.
[3] Coello, Carlos Artemio Coello. "An Empirical Study of Evolutionary Techniques for Multi-objective Optimization in Engineering Design". Ph.D. Dissertation, Department of Computer Science, Tulane University, New Orleans, LA, 1996.
[4] H. J. M. Veendrick, "Short-circuit dissipation of static CMOS circuit and its impact on the design of buffer circuits," IEEE J. Solid-State Circuits, Vol. 19, Aug 1984, pp. 468-473.
[5] Charles H. Bennett, "Notes on Landauer‟s Principle, Reversible Computation and Maxwell‟s Demon", Studies in History and Philosophy of Modern Physics, v. 34, pp. 501-510, 2003.

Abstract: In order to ascertain that an electric power is economically transferred over the grid system with maximum efficiency and reliability at virtually fixed voltage and frequency to consumers, it becomes imperative to carry out power flow studies. This study presents a model of an electrical distribution grid on a computer system for simulation. Hence the research work models and simulates a distribution grid using the "ETAPS" software. By making a model of the distribution network, the value of real and reactive powers and voltage magnitudes in the whole network can be observed. The simulation results obtained from the existing condition of 33-kV Ota transmission network and the 11/0.415-kV Yusuf and Abule-Iroko injection substations indicate that 15 feeder pillars have low voltage violations. To solve the problem of voltage violations, shunt capacitor compensators were placed at affected locations, resulting in a network with improved voltageprofile.
Keywords: ETAP software, power flow, shunt capacitor, simulation, voltage magnitude.

[1]. O.S. Onohaebi, Power system analysis; M.Eng lecture notes, Department of electrical engineering, University of Benin, Benin-City, Edo state, Nigeria.
[2]. D. Das, P. Kaothari and A. Kalam, Simple and efficient methods for load flow solution of radial distribution system, Electrical Power and Energy Systems, 17(5), 1995, 335-346.
[3]. M. S. Bhailla, Proceedings of National conference and regulation in infrastructure services, New Delhi, India, 2000.
[4]. Power Holding Company of Nigeria (PHCN) Plc, 2006, One-line diagram of Abule-Egba distribution network.
[5]. I. Boldea, Synchronous generators (Electrical power engineering series, 2005).

Abstract: This paper gives a new modified technique for evaluating non-convex economic dispatch (NCED) problem having non-linear, discontinuous cost function. This new particle swarm optimization technique incorporates time varying acceleration coefficients (NPSOTVAC). The highly non-linear cost function due to ramp rate limit, prohibited operating zones and valve point loading effect is considered in the proposed method. The effectiveness of proposed NPSOTVAC algorithm is proved through test on 6 and 15 unit test systems.
Keywords: Nonconvex economic dispatch (NCED), Particle swarm optimization (PSO), Time varying acceleration coefficients (TVAC), New PSO with Time-Varying Acceleration Coefficients (NPSOTVAC).

[1]. A.J. Wood and B.F. Wollenberg, ―Power generation, operation and control‖, (Book), New York, Wiley, 1984.
[2]. D.C. Walter and G. B. Sheble, ―Gentic algorithm solution of economic load dispatch with valve point loading‖ ,IEEE Transactions on Power Systems., vol. 8, pp.1325-1332, Aug 1993.
[3]. S.O.Orero and M.R. Irving, ―Economic dispatch of generators with prohibited operating zones: a genetic algorithm approach‖, IEE proceedings, Generation, transmission and Distribution, vol. 143, No. 6, November 1996.
[4]. Z.L. Gaing, ―Particle swarm optimization to solving the economic dispatch considering generator constraints‖, IEEE Trans. Power system,vol. 18, no. 3, August 2003, pp.1718-1727.
[5]. J.B. Park, K.S. Lee, J.R. Shin and K.Y. Lee, ―A Particle swarm optimization for Economic Dispatch with non-smooth cost functions‖, IEEE Trans. Power system,.vol. 20, no. 1, February 2005, pp.34-42.

Abstract: The objective of the present study is to simulate short circuit faults on different buses of a power system network and to estimate the state of the power system before and after a fault, which includes various bus voltages and current flow on various transmission lines. The analysis before the fault is carried out by solving non-linear load flow problem by using numerical iterative technique of Newton-Raphson method. State estimation after short circuit fault is carried by using algorithm of short circuit current computation. The short circuit currents dictate the rating of circuit breakers to be employed at various buses and in various lines of the network. The effect of three phase short circuit faults on power system has been studied in terms of post-fault conditions and pre-fault conditions. In this paper, three phase short circuit fault is simulated on the standard IEEE 11bus and IEEE 30 bus system and fault current level is calculated and short circuit MVA rating for the circuit breaker has been chosen. The analysis of power system under faulty conditions is important to determine the values of system voltages and currents during faulted conditions, so that protective devices may be set to minimize the harmful effects of such contingencies.
Keywords: Load flow, Short circuit current, SCMVA ratings of circuit breakers, Three phase fault calculation.

[1] Adnan Kakilli, System analysis with the MVA method for Symmetrical Three-Phase Faults, TEM Journal, volume 2, number 1,pp-51-56,2013.
[2] A.Muhammad, Simulation of Different Types of Faults on Northern Iraq Power System, IGEC VI – 2011 – 028.
[3] Okelola, M.O, Yussuf, A.A, and Awosope, C.O.A.,Fault Analysis: An Application of Venin's Method to 330kv Transmission Grid System in Nigeria,
LAUTECH Journal of Engineering and Technology, Vol.3, No.1, pp.30-43,2005.
[4] I.J. Nagrath, and D.P.Kothari, Modern Power System Analysis, Tata McGraw-Hill Publishing Company Limited, New Delhi,India,2012.
[5] V.K.Mehta and R.Mehta, Principles of Power Systems, S.Chand and Company Limited, New Delhi, India, 2010.

Abstract: Wind energy is an important source of electrical power in recent years. d summarize the content of the paper. Its main advantage comes from the fact of being a renewable and environmental-friendly energy. Permanent magnet synchronous generators (PMSG) applied to wind energy conversion system (WECS) using variable speed operation is being used more frequently in wind turbine application. Variable speed systems have several advantages over the traditional method of operating wind turbines, such as the reduction of mechanical stress and an increase in energy capture. To allow the variable speed operation of the PMSG WECS a conventional three-phase bridge rectifier (BR) with a bulky capacitor associated with a voltage source current controlled inverter (VS-CCI) is used. This paper presents a comparative simulation study between three different approaches applied to harmonic mitigation in PMSG WECS. The studied techniques are single-switch three-phase boost rectifier and three-phase boost type PWM rectifier.
Keywords: Harmonic mitigation, PMSG, WECS, Bridge rectifier, Boost rectifier.

[1] K. Tan and S. Islam, "Optimum Control Strategies in Energy Conversion of PMSG Wind Turbine System Without Mechanical Sensors", IEEE Transactions on Energy Conversion, Vol. 19, No. 2, June 2004, pp. 392-400.
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[4] Robert W. Erickson, "Some Topologies of High Quality Rectifiers" Keynote paper, First International Conference on Energy, Power, and Motion Control, May 5-6, 1997, Tel Aviv, Israel, pp. 1-6.
[5] Kaboli, Sh.; Zolghadri, M.R.; Homaifar, A., "Effects of sampling time on the performance of direct torque controlled induction motor drive", IEEE International Symposium on Industrial Electronics, 2003. ISIE '03, Volume: 2 , June 9-11, 2003, pp.:1049–1052.